Study of plasma–surface interactions during overetch of polycrystalline silicon gate etching with high-density HBr/O2 plasmas

Tuda, Mutumi; Shintani, Kenji; Tanimura, Junji

doi:10.1063/1.1409952

Cited by 24 publications

(18 citation statements)

References 16 publications

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“…Some have proposed that the oxidation rate is controlled by positive oxygen ion flux, 7,11 while others have suggested negative oxygen a͒ Electronic mail: savitale@ti.com ions are responsible for oxide growth. 3,8,10,13 Finally, some researchers have proposed that oxygen atom diffusion controls the growth rate. 9 Several models for plasma oxidation have been proposed, all using the Deal-Grove thermal oxidation model 14 as a starting point.…”

Section: Plasma Oxidationmentioning

confidence: 99%

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Reduction of silicon recess caused by plasma oxidation during high-density plasma polysilicon gate etching

Vitale¹,

Smith²

2003

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Section: Plasma Oxidationmentioning

confidence: 99%

“…Vallier et al 2 also studied the oxidation of silicon beneath thin gate oxides. Tuda et al 3 examined the role of by-product redeposition and oxide growth on the thickness of the gate oxide.…”

Section: Introductionmentioning

confidence: 99%

Reduction of silicon recess caused by plasma oxidation during high-density plasma polysilicon gate etching

Vitale¹,

Smith²

2003

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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“…Therefore, we have developed fluorine based plasmas to clean the chamber walls using SF 6 . The fluorocarbon layer coated on the chamber walls is usually removed using an O 2 plasma.…”

Section: B Chemical Analysis Of Chamber Wall Coatings After Dielectrmentioning

confidence: 99%

Analyses of chamber wall coatings during the patterning of ultralow-k materials with a metal hard mask: Consequences on cleaning strategies

Chevolleau

Darnon

David

et al. 2007

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Articles you may be interested inResidue growth on metallic-hard mask after dielectric etching in fluorocarbon-based plasmas. I. MechanismsLow temperature remote plasma cleaning of the fluorocarbon and polymerized residues formed during contact hole dry etching Changes in chamber wall conditions ͑e.g., chemical surface composition͒ are identified as one of the main causes of process drifts leading to changes in the process performance ͑etch rates, etch profiles, selectivity, uniformity, etc.͒. The impact of a metal hard mask on the coating formed on the chamber walls during the dielectric etching process and reactor dry cleaning procedure has been investigated. The authors have used a technique based on x-ray photoelectron spectroscopy to monitor the chemical composition of the layer deposited on an electrically floating sample placed on the top of a patterned wafer exposed to typical plasma processing conditions ͑coatings deposited on the floating sample are representative of those deposited on the chamber walls͒. They have patterned porous SiOCH damascene structures using a TiN hard mask. After hard mask opening in a silicon etcher using Cl 2 based plasmas, they have shown that the chamber walls are coated by a thin SiOCl coating containing small concentrations of Ti. After photoresist ashing in the same etcher ͑with an O 2 plasma͒, the chamber wall coating is oxidized leading to the formation of a mixed SiO x -TiO x deposit. The cleaning strategy to remove this coating from the chamber walls consists in using a two step cleaning procedure: ͑1͒ a Cl 2 based plasma ͑Ti removal͒, followed by ͑2͒ a SF 6 /O 2 plasma ͑SiOCl species removal͒. During low-k etching in an oxide etcher with a fluorocarbon based chemistry, the chamber walls are coated by a fluorocarbon layer containing a significant concentration of Ti. They have developed a two step cleaning procedure: ͑1͒ a SF 6 plasma to remove the fluorocarbon layer and Ti based species and ͑2͒ an O 2 flash plasma ͑for a short time͒ to clean up the chamber walls from the remaining carbon.

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“…20 The soft landing step is an additional step which is used nowadays to prevent the gate oxide degradation while the overtetch step is always used to remove the silicon residues from the gate oxide. However, it sounds important to understand how the passivation layer formed on the silicon sidewalls during the main etch step evolves during the landing and overetch steps of the full process and how this evolution may impact the final gate profiles in dense and isolated structures.…”

Section: Hbrõcl 2 õO 2 Chemistrymentioning

confidence: 99%

Impact of chemistry on profile control of resist masked silicon gates etched in high density halogen-based plasmas

Detter

Palla

Thomas-Boutherin

et al. 2003

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Testing new chemistries for mask repair with focused ion beam gas assisted etchingCritical dimension ͑CD͒ control during silicon gate etching has been investigated with state-of-the-art chemistries. In particular, we have compared the etched profile of both isolated and dense gates obtained after the main etch step of a gate etch process using HBr/Cl 2 /O 2 and HBr/Cl 2 /O 2 /CF 4 gas mixtures, and study the influence of the CF 4 /O 2 ratio in this mixture. We demonstrate that the gate etch profile is mainly driven by the passivation layer deposited on the gate and mask sidewalls during the etching. Due to aspect ratio dependant etching effect the passivation layer formation is thinner in dense than in isolated structures resulting in significant profile microloading. However, CF 4 addition to HBr/Cl 2 /O 2 strongly minimizes the difference in passivation layer thickness between dense and isolated lines thus potentially improving the critical dimension control. These results will be discussed in terms of chemical composition of the passivation layer and deposition mechanisms, based on previous studies by x-ray photoelectron spectroscopy and mass spectrometry studies. Finally, we will discuss the influence of the soft-landing and overetch steps on the final profile of the gates, and show that aspect ratio dependant etch rate during the main etch step of the process can become an additional source of CD microloading.

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Study of plasma–surface interactions during overetch of polycrystalline silicon gate etching with high-density HBr/O2 plasmas

Cited by 24 publications

References 16 publications

Reduction of silicon recess caused by plasma oxidation during high-density plasma polysilicon gate etching

Reduction of silicon recess caused by plasma oxidation during high-density plasma polysilicon gate etching

Analyses of chamber wall coatings during the patterning of ultralow-k materials with a metal hard mask: Consequences on cleaning strategies

Impact of chemistry on profile control of resist masked silicon gates etched in high density halogen-based plasmas

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