2015
DOI: 10.1109/tcpmt.2015.2470550
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Study of Techniques for Flip-Chip Bonding to Organic Substrates for Low-Power Applications

Abstract: This paper deals with the study of technologies for flip-chip assembly of CMOS integrated power converters on standard FR4 organic substrates. Tests for the characterization of commercially available technologies for microassemblies, such as anisotropic adhesive bonding, thermocompression bonding, thermosonic/ultrasonic bonding, and solder bonding, are carried out. The aim of this paper is to determine the most suitable flip-chip bonding technology for power CMOS circuits with more than 50 pads. First, the cou… Show more

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Cited by 4 publications
(3 citation statements)
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“…Flip chip bonding technology is not only applied to the interconnect formation of a 3D assembly of LSI [50,51] but also to that of optical devices such as light-emitting diodes [69][70][71][72][73]. FCB can be a useful technology for camera module assembly [74], low-power applications [75], and system-in-packaging [76]. New methods [77][78][79], such as bumpless bonding and surface-activated bonding are also proposed for high-density 3D advanced packaging.…”
Section: Flip Chip Bondingmentioning
confidence: 99%
“…Flip chip bonding technology is not only applied to the interconnect formation of a 3D assembly of LSI [50,51] but also to that of optical devices such as light-emitting diodes [69][70][71][72][73]. FCB can be a useful technology for camera module assembly [74], low-power applications [75], and system-in-packaging [76]. New methods [77][78][79], such as bumpless bonding and surface-activated bonding are also proposed for high-density 3D advanced packaging.…”
Section: Flip Chip Bondingmentioning
confidence: 99%
“…The Au bumps on the pads (Fig. 5b) were used to simulate the Cu pillars found in real bonding conditions [1,5,9,18,19]. A 3 mm square Si die was then picked up by the bond head and used as a pressure plate to apply force and temperature (Fig.…”
Section: Tcb Simulationmentioning
confidence: 99%
“…Flip chip and associated assembly technologies allow the connections between the chip's pads and the tracks of the substrate via adhesive paste, stud bumps, copper pillars, or solder bumps instead of bonding wires [25]. The result is a significant downsizing of chip package, reducing the assembly cost and decreasing the parasitic phenomena such as interconnect resistances and inductances [34]. In addition, it reduces the number of thermal interfaces between the chip and the substrate, which operates as the principal heat removal path.…”
Section: Design Of the Power Cmos Diementioning
confidence: 99%