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This paper deals with the study of technologies for flip-chip assembly of CMOS integrated power converters on standard FR4 organic substrates. Tests for the characterization of commercially available technologies for microassemblies, such as anisotropic adhesive bonding, thermocompression bonding, thermosonic/ultrasonic bonding, and solder bonding, are carried out. The aim of this paper is to determine the most suitable flip-chip bonding technology for power CMOS circuits with more than 50 pads. First, the coupled design of the CMOS chip and the corresponding substrate dedicated to low-power microconversion (10 W) is presented. It is shown that the parasitic resistances and inductances of the interconnections increase the conduction and switching losses of the device. This leads to a temperature rise, which can limit the operating ratings of the circuit. The experimental results are provided to evaluate each technology for flip-chip assembly.Index Terms-CMOS integrated circuits, electronics packaging, flip-chip devices.

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