Study of the hot spot of an in-plane gate transistor by scanning Joule expansion microscopy

Abstract

The local heat dissipation of an in-plane gate (IPG) transistor was investigated by means of a thermally modulated scanning Joule expansion microscope. The nanostructured sample was prepared by focused ion beam techniques. The temperature induced thermal expansion and the topographic information are measured simultaneously. The spatial resolution of the constructed microscope is below 50 nm. Heat spots of the semiconducting devices are visualized by heating them with modulated drain voltage. The heat spot position and the temperature amplitude of the heat spot on the IPG transistor depend on the gate voltage VG. With an increasing negative magnitude of VG the heat spot displaces in the direction from drain towards source. Simultaneously the temperature amplitude of the maximum of the heat spot and the thermal expansion integrated over the heated area decrease linearly.

Quantitative Thermal Imaging of Single-Walled Carbon Nanotube Devices by Scanning Joule Expansion Microscopy

“…Here we report the application and further development of the SJEM method to investigate heat generation and transport in transistors that incorporate straight, horizontally aligned arrays of individual SWNTs. The small dimensions (diameters ∼0.5–1.7 nm) of these SWNT-based heat sources and their quasi-one-dimensional nature differentiate them from structures that have been examined previously by SJEM. − The images directly and immediately reveal important physics associated with Joule heating in SWNT devices under various electrical bias conditions, in ways that can be used to identify defects and other nonideal features of the SWNTs, as well as variations in electrical switching behaviors. Quantitative interpretation of the results with analytical models and finite element analysis (FEA) for heat flow and thermal expansion enables accurate determination of the distributions in temperature.…”

Double modulated thermoreflectance microscopy of semiconductor devices

“…14 Figure 4 shows two line scans perpendicular to an implanted insulating line on a SI-MOX wafer recorded at 4 f for the two polarities of the ac voltage of sinusoidal shape. The different positions of the two maxima for positive and negative polarity, ⌬xϷ4 m, indicate that the major contributions to the 4 f amplitudes are due to charge carrier recombination at the lateral borders of the insulating line.…”

Coupled electron–heat transport in nonuniform thin film semiconductor structures

“…We refer to a recent monograph 14 for many practically important cases. The relevant observations are found with bipolar transistors [14][15][16][17][18] , other metal-insulatorsemiconductor structures, [19][20][21][22][23][24] , nanoscale transistors, 25 , graphene transistors, 26 , and thin-film photovoltaics. [27][28][29][30] In these applications, the phenomenon under consideration was labeled as thermal runaway, or hot spot, or (reversible) thermal breakdown.…”