Study of the influence of substrate topography on the focusing performance of advanced lithography scanners

Fontaine, Bruno M. La; Hauschild, Jan; Dusa, Mircea V.; Acheta, Alden; Apelgren, Eric M.; Boonman, M.E.J.; Krist, Jouke; Khathuria, Ashok; Levinson, Harry; Fumar-Pici, Anita; Pieters, Marco

doi:10.1117/12.485535

Cited by 13 publications

(7 citation statements)

References 4 publications

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“…Three main sources of process variation are dose, focus and mask bias. The critical feature response to dose and focus is very well documented and its behavior is typically represented by Bossung plots and Mask Bias in Mask Enhancement Error Factor (MEEF) 9,10 . Since process control is not perfect, small variations in these three parameters provide a predictable signature in the response of the layout.…”

Section: Analysis Modulesmentioning

confidence: 99%

Non-uniform yield optimization for integrated circuit layout

Pikus

Torres

2007

SPIE Proceedings

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We demonstrate a consolidated metric that can quantitatively express design quality with respect to multiple yield loss mechanisms. Using this metric and the design analysis and optimization framework we have developed, we study the effectiveness of different layout enhancements and the effect of combining multiple enhancements in a single layout.Previous works attempted to select a single combination of design enhancements that presents the optimal trade-off between different yield loss mechanisms and optimizes the total yield. We show that the optimal solution depends on the layout features on a small scale, thus the best yield can be achieved by selecting different combinations of enhancements in different locations. We introduce a general form of the cost function and compare different layout configurations, taking into account lithography process variations, random defect distributions, and recommended design rules. Since all layout configurations represent the same electrical devices, it is possible to dynamically determine the most robust layout implementation according to the cost function that incorporates the relative importance of each yield loss contributor. We compare the globally optimized layout, where the sequence of yield enhancements is selected based on the overall design yield, with locally optimized layouts, where the enhancements are fine-tuned for each location.We show that when comparing different layout enhancements it is important to consider two types of yield tradeoffs, local tradeoffs where the same layout feature impacts several yield loss mechanisms, and global tradeoffs where the net effect of a particular type of layout enhancement depends on its location. By selectively applying yield enhancements to the areas of the layout where they are needed we can considerably improve the overall design quality.

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Section: Analysis Modulesmentioning

confidence: 99%

Non-uniform yield optimization for integrated circuit layout

Pikus

Torres

2007

SPIE Proceedings

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“…Fontaine 3,6 showed that the quality of wafer flatness was the most important factor in reducing overall focus variation. In our study, the effects of 3 kinds of wafer (double polished wafer, single polished with double polished flatness quality [SSPW (super)], and single polished) on focus variation, process window margin, and number of defects on 80 nm node DRAM device were investigated.…”

Section: Wafer Topography Of Focus Budgetmentioning

confidence: 98%

Influence of material on process focus budget and process window of 80nm DRAM devices

et al. 2005

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A new type of focus monitoring mask, multiple phase-phase shift mask (MP-PSM), has been designed, and the focus budget of a lithography process was investigated. MP-PSM was used to identity focus controllability of several scanners and was able to detect focus change smaller then 20 nm. We also investigated the difference in focus variation across a wafer between double side polished wafers and single side polished wafers. A comparative study of focus controllability of a scanner using 80 nm node DRAM pattern showed that the focus controllability of a scanner was directly affected by wafer type. Using double side polished wafers increased the process window.

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“…A number of techniques have been introduced, using advanced imaging methods such as phase shift mask, to characterize exposure tool focus. Phase Shift Focus Monitor (PSFM) [1], and Phase Grating Focus Monitor (PGFM) [2], convert focus errors into alignment errors that can be measured with an overlay measurement tool. These techniques provide a higher sensitivity than the traditional method, and have been commercially successful for focus calibration in the past years.…”

Section: Introductionmentioning

confidence: 99%

Probe-pattern grating focus monitor through scatterometry calibration

2008

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This paper presents a new highly sensitive scatterometry based Probe-Pattern Grating (PPG) focus monitor and its printing assessment on an advanced exposure tool. The high sensitivity is achieved by placing transparent lines spaced at the strong focus spillover distance from the centerline of a 90 degree phase-shifted probe line that functions as an interferometer detector. The monitor translates the focus error into the probe line trench depth, which can be measured by scatterometry techniques. The sensitivity of the defocus measurement through scatterometry calibration is around 1.1nm defocus / nm trench depth. This result indicates that the PPG focus monitor from a single wafer focus setting can detect the defocus distance to well under 0.05 Rayleigh Units.

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Study of the influence of substrate topography on the focusing performance of advanced lithography scanners

Cited by 13 publications

References 4 publications

Non-uniform yield optimization for integrated circuit layout

Non-uniform yield optimization for integrated circuit layout

Influence of material on process focus budget and process window of 80nm DRAM devices

Probe-pattern grating focus monitor through scatterometry calibration

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