Study of the Walk-Out Effect of Junction Breakdown Instability of the High-Voltage Depletion-Mode N-Channel MOSFET for NAND Flash Peripheral Device and an Efficient Layout Solution

Lo, Chieh Roger; Yeh, Teng-Hao; Chen, Wei‐Chen; Lue, Hang-Ting; Wang, Keh-Chung; Lu, Chih‐Yuan; Chang, YoungChul; Chen, Yung‐Hsiang; Liu, Chu-Yung

doi:10.1109/irps45951.2020.9129216

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“…A complete NAND flash memory chip is mainly composed of flash memory particles and CMOS peripheral circuits. At present, the construction of CMOS peripheral circuits mainly includes the following three ways: CMOS next Array (CnA) [1], [2], CMOS under array (CuA) [3], [4] and Xtacking [5], [6]. But no matter which way it is, the NAND flash array and peripheral circuits need to be prepared on different layers and by different processes.…”

Section: Introductionmentioning

confidence: 99%