Studying optimal spilling in the light of SSA

Colombet, Quentin; Brandner, Florian; Darte, Alain

doi:10.1145/2038698.2038706

Cited by 8 publications

(7 citation statements)

References 15 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Various optimal spillers for a given arrangement of instructions have also been proposed. Colombet et al [CBD11] summarize and generalize this work.…”

Section: Related Workmentioning

confidence: 61%

Optimal and Heuristic Global Code Motion for Minimal Spilling

Barany

Krall

2013

Lecture Notes in Computer Science

View full text Add to dashboard Cite

Abstract. The interaction of register allocation and instruction scheduling is a well-studied problem: Certain ways of arranging instructions within basic blocks reduce overlaps of live ranges, leading to the insertion of less costly spill code. However, there is little previous research on the extension of this problem to global code motion, i .e., the motion of instructions between blocks. We present an algorithm that models global code motion as an optimization problem with the goal of minimizing overlaps between live ranges in order to minimize spill code. Our approach analyzes the program to identify the live range overlaps for all possible placements of instructions in basic blocks and all orderings of instructions within blocks. Using this information, we formulate an optimization problem to determine code motions and partial local schedules that minimize the overall cost of live range overlaps. We evaluate solutions of this optimization problem using integer linear programming, where feasible, and a simple greedy heuristic. We conclude that global code motion with the sole goal of avoiding spills rarely leads to performance improvements because code is placed too conservatively. On the other hand, purely local optimal instruction scheduling for minimal spilling is eective at improving performance when compared to a heuristic scheduler for minimal register use.

show abstract

“…Various optimal spillers for a given arrangement of instructions have also been proposed. Colombet et al [CBD11] summarize and generalize this work.…”

Section: Related Workmentioning

confidence: 61%

Optimal and Heuristic Global Code Motion for Minimal Spilling

Barany

Krall

2013

Lecture Notes in Computer Science

View full text Add to dashboard Cite

show abstract

“…Load-store optimization avoids reloading spilled values by reusing values loaded in previous parts of the spill code. Multi-allocation allocates temporaries simultaneously to registers as well as memory, reducing the overhead of spilling in certain scenarios [31]. Register packing assigns temporaries of small bit-widths to different parts of larger-width registers (for processors supporting such assignments) to improve register utilization.…”

Section: Register Allocationmentioning

confidence: 99%

“…A particular focus has been to study the trade-off between solution quality and scalability. Numerous approaches [3,31,35] advocate solving spilling first (including relevant aspects of coalescing in the case of Colombet et al [31]), followed by register assignment and coalescing. This arrangement can improve scalability with virtually no performance loss for single-issue and out-of-order processors, but is less suitable when register assignment and coalescing have high impact on code quality, such as in code size optimization [58] or in speed optimization for VLIW processors [31].…”

Section: Related Approachesmentioning

confidence: 99%

“…Alternative temporaries are related to Colombet et al's local equivalence classes [31] in their definition and targeted program transformations, and to Wilson et al's alternative implementations [101,102] in their way of extending the original program representation with implementation choices to be considered by a solver.…”

Section: Spilling Live Range Splitting and Coalescingmentioning

confidence: 99%

“…Modeling rematerialization as an alternative load-move instruction is inspired by Colombet et al [31]. Unlike Colombet et al, we use copy operations and extend the register array to avoid additional variables and constraints.…”

Section: Rematerializationmentioning

confidence: 99%

See 2 more Smart Citations

Combinatorial Register Allocation and Instruction Scheduling

Lozano

Carlsson

Blindell

et al. 2019

ACM Trans. Program. Lang. Syst.

View full text Add to dashboard Cite

This paper introduces a combinatorial optimization approach to register allocation and instruction scheduling, two central compiler problems. Combinatorial optimization has the potential to solve these problems optimally and to exploit processor-specific features readily. Our approach is the first to leverage this potential in practice: it captures the complete set of program transformations used in state-of-the-art compilers, scales to mediumsized functions of up to 1000 instructions, and generates executable code. This level of practicality is reached by using constraint programming, a particularly suitable combinatorial optimization technique. Unison, the implementation of our approach, is open source, used in industry, and integrated with the LLVM toolchain.An extensive evaluation confirms that Unison generates better code than LLVM while scaling to mediumsized functions. The evaluation uses systematically selected benchmarks from MediaBench and SPEC CPU2006 and different processor architectures (Hexagon, ARM, MIPS). Mean estimated speedup ranges from 1.1% to 10% and mean code size reduction ranges from 1.3% to 3.8% for the different architectures. A significant part of this improvement is due to the integrated nature of the approach. Executing the generated code on Hexagon confirms that the estimated speedup results in actual speedup. Given a fixed time limit, Unison solves optimally functions of up to 946 instructions, nearly an order of magnitude larger than previous approaches.The results show that our combinatorial approach can be applied in practice to trade compilation time for code quality beyond the usual compiler optimization levels, identify improvement opportunities in heuristic algorithms, and fully exploit processor-specific features. This paper is partially based on preliminary work presented at the Principles and Practice of Constraint Programming (2012) [20]; Languages, Compilers, and Tools for Embedded Systems (2014) [21]; and Compiler Construction (2016) [22] conferences. Compared to the preliminary work, this paper is completely restructured and rewritten, completes the combinatorial model with rematerialization, proposes extensions to capture additional program transformations and processor-specific features, and contributes a more exhaustive evaluation. Additions to the evaluation include more benchmarks and processors, evidence of the fundamental benefit of the integrated approach, an in-depth study of scalability, and actual execution measurements.

show abstract

Investigation on the Optimization for Storage Space in Register-Spilling

Qiu

et al. 2017

Collaborate Computing: Networking, Applications and Worksharing

View full text Add to dashboard Cite

Studying optimal spilling in the light of SSA

Cited by 8 publications

References 15 publications

Optimal and Heuristic Global Code Motion for Minimal Spilling

Optimal and Heuristic Global Code Motion for Minimal Spilling

Combinatorial Register Allocation and Instruction Scheduling

Investigation on the Optimization for Storage Space in Register-Spilling

Contact Info

Product

Resources

About