-We have investigated the stability of the gate stack of GaN n-MOSFETs under positive gate stress. Devices with a gate dielectric that consists of pure SiO2 or a composite SiO2/Al2O3 bilayer were studied. Our research has targeted the evolution of threshold voltage (VT), subthreshold swing (S) and transconductance (gm) after positive gate voltage stress of different duration at different voltages and temperatures. We have also examined the recovery process after the stress is removed. We have observed positive VT shift (∆VT) in both gate dielectrics under positive gate stress. In devices with a SiO2 gate oxide, we have found that ∆VT is caused by a combination of electron trapping in pre-existing oxide traps and interface trap generation. In devices with a composite SiO2/Al2O3 gate oxide, on the other hand, ∆VT is due to electron trapping in pre-existing oxide traps and generation of near interface oxide traps.