1995
DOI: 10.1109/77.403301
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Superconducting packet switch

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Cited by 14 publications
(8 citation statements)
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“…The critical path analysis shows that 4 GHz clock operations and a maximum throughput of 64 Gb/s can be expected [7]. At least five clock cycles are required for a packet to pass through the prototype switch.…”
Section: Prototype Superconducting Packet Switchmentioning
confidence: 98%
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“…The critical path analysis shows that 4 GHz clock operations and a maximum throughput of 64 Gb/s can be expected [7]. At least five clock cycles are required for a packet to pass through the prototype switch.…”
Section: Prototype Superconducting Packet Switchmentioning
confidence: 98%
“…However, it is said that this approach will be limited in the near future because of the problems of packaging or power dissipation of huge numbers of semiconductor large scale integrators (LSI's) [4]. Thus, substitute devices using superconducting or optical technologies are now attracting attention [5]- [7].…”
Section: Introductionmentioning
confidence: 99%
“…Once an address bit has been used to route data in a 2x2 element, it is deleted from the data stream. The 2x2 switch can be used to form a network, each column routing on a different address bit (see for example [2]). Since each 2x2 element in this design routes on the bit following S, the deletion of address bit allows for the use of only one design for all of the 2x2 switch elements in a network.…”
Section: C 2x2 Switch Circuit Descriptionmentioning
confidence: 99%
“…However, it is said that semiconductor switches cannot cope with this demand because of increasing difficulties in packaging and power dissipation of LSI chips. Thus, novel switches using superconducting or optical technologies are now attracting attention [3]- [11].…”
Section: Introductionmentioning
confidence: 99%
“…By using these merits, a superconducting packet switch with very high throughput and low latency can be realized. In order to study the feasibility of superconducting packet switches, a prototype switch has been designed [12]. It is a nonblocking and self-routing switch and has a Batcher-Banyan architecture with input buffers.…”
Section: Introductionmentioning
confidence: 99%