2013 IEEE Congress on Evolutionary Computation 2013
DOI: 10.1109/cec.2013.6557578
|View full text |Cite
|
Sign up to set email alerts
|

Supergenes in a genetic algorithm for heterogeneous FPGA placement

Abstract: Abstract-Supergenes are an addition to a genetic algorithm's genome that duplicate genes in the genome, represent local optimizations, and have the potential to be expressed overriding the duplicated gene. We introduce supergenes in a genetic algorithm for FPGA placement where a placement algorithm places a mix of fine-grain components and medium-grain components (where a medium-grain component is 2 to 10 times the size of a finegrain component). This is the first placement algorithm, to our knowledge, that ca… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
2
1

Citation Types

0
9
0

Year Published

2014
2014
2022
2022

Publication Types

Select...
4
3
1

Relationship

0
8

Authors

Journals

citations
Cited by 11 publications
(9 citation statements)
references
References 25 publications
0
9
0
Order By: Relevance
“…FPGA placement maps a clustered logical circuit to an array of ixed physical components to optimize routing area, critical path, power eiciency, and other metrics. FPGA placement algorithms can be broadly classiied into four categories: (1) classic min-cut partitioning [32,33,46], (2) popular simulated-annealing-based methods [2,3,23,31], (3) analytical placement currently used in FPGA CAD tools [1,12,15,28], and (4) esoteric evolutionary approaches [7,20,47]. Min-cut algorithm worked well on small FPGA capacities by iteratively partitioning the circuit to spread the cells across the device.…”
Section: Fpga Placementmentioning
confidence: 99%
See 1 more Smart Citation
“…FPGA placement maps a clustered logical circuit to an array of ixed physical components to optimize routing area, critical path, power eiciency, and other metrics. FPGA placement algorithms can be broadly classiied into four categories: (1) classic min-cut partitioning [32,33,46], (2) popular simulated-annealing-based methods [2,3,23,31], (3) analytical placement currently used in FPGA CAD tools [1,12,15,28], and (4) esoteric evolutionary approaches [7,20,47]. Min-cut algorithm worked well on small FPGA capacities by iteratively partitioning the circuit to spread the cells across the device.…”
Section: Fpga Placementmentioning
confidence: 99%
“…The earliest one by Venkatraman and Patnaik [47] encodes each two-dimensional block location in a gene and evaluates the population with a itness function for critical path and area eiciency. More recently, P. Jamieson [18], [19] points out that GAs for FPGA placement are inferior to annealing mainly due to the crossover operator's weakness and proposed a clustering technique called supergenes [20] to improve its performance.…”
Section: Evolutionary Algorithmsmentioning
confidence: 99%
“…For the task of optimizing the placement of M logic blocks in a region of N possible configurable tiles, it should be noted that a simplification of the FPGA placement problem could be considered equivalent to the task of selecting M tiles (one for each logic block to be placed) out of the N available tiles. Consequently, the most common approaches to representation (for this problem) employ a sequence of integers to either specify the element of the set of tiles that is associated with each block [14], or to specify the element of the set of blocks that is associated with each empty tile [10].…”
Section: Genetic Algorithm Approachmentioning
confidence: 99%
“…Consequently, the most common approaches to representation (for this problem) employ a sequence of integers to either specify the element of the set of tiles that is associated with each block [11], or to specify the element of the set of blocks that is associated with each empty tile [6], [12], [13]. Our analysis opted for the latter representation, using a sequence of N integers to represent each placement such that each integer was taken from the interval [-1, M), with values between 0 and M corresponding to the logic block with the same index, and the value -1 corresponding to every tile to which a block has not been assigned.…”
Section: Fpga Placement With Genetic Algorithmsmentioning
confidence: 99%