SuperMind: a survey of the potential of superconducting electronics for neuromorphic computing

Schneider, Michael L.; Toomey, Emily; Rowlands, Graham E.; Shainline, Jeffrey M.; Tschirhart, Paul; Segall, K.

doi:10.1088/1361-6668/ac4cd2

Cited by 40 publications

(23 citation statements)

References 115 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…For example, neural networks using superconductivity and Josephson effects are characterized by fast performance (10 10 vs. 10 3 impulses/neuron/s in superconducting NN in comparison with biological NN). Also, energy efficiency (power consumption at ~0.1 mW) is an advantage [84][85][86].…”

Section: Methodsmentioning

confidence: 99%

A Survey on Symmetrical Neural Network Architectures and Applications

et al. 2022

View full text Add to dashboard Cite

A number of modern techniques for neural network training and recognition enhancement are based on their structures’ symmetry. Such approaches demonstrate impressive results, both for recognition practice, and for understanding of data transformation processes in various feature spaces. This survey examines symmetrical neural network architectures—Siamese and triplet. Among a wide range of tasks having various mathematical formulation areas, especially effective applications of symmetrical neural network architectures are revealed. We systematize and compare different architectures of symmetrical neural networks, identify genetic relationships between significant studies of different authors’ groups, and discuss opportunities to improve the element base of such neural networks. Our survey builds bridges between a large number of isolated studies with significant practical results in the considered area of knowledge, so that the presented survey acquires additional relevance.

show abstract

Section: Methodsmentioning

confidence: 99%

A Survey on Symmetrical Neural Network Architectures and Applications

et al. 2022

View full text Add to dashboard Cite

show abstract

“…Josephson junctions (JJs) [ 59,61,62,75,208–210 ] and superconducting nanowires [ 211–214 ] are the two principal forces that directly access neuromorphic computing at the device level, with particular implementations often exactly dual with each other. [ 77 ] For instance, the ion channel dynamics of LIF neurons can be efficiently mimicked by two cascading JJs, and the emulation of neuronic relaxation oscillation can be realized by a nanowire resistor incorporation as well.…”

Section: Phase Transitionmentioning

confidence: 99%

Reconfigurable Neuromorphic Computing: Materials, Devices, and Integration

Chen

Guo

et al. 2023

Advanced Materials

View full text Add to dashboard Cite

Neuromorphic computing has been attracting ever‐increasing attention due to superior energy efficiency, with great promise to promote the next wave of artificial general intelligence in the post‐Moore era. Current approaches are, however, broadly designed for stationary and unitary assignments, thus encountering reluctant interconnections, power consumption, and data‐intensive computing in that domain. Reconfigurable neuromorphic computing, an on‐demand paradigm inspired by the inherent programmability of brain, can maximally reallocate finite resources to perform the proliferation of reproducibly brain‐inspired functions, highlighting a disruptive framework for bridging the gap between different primitives. Although relevant research has flourished in diverse materials and devices with novel mechanisms and architectures, a precise overview remains blank and urgently desirable. Herein, the recent strides along this pursuit are systematically reviewed from material, device, and integration perspectives. At the material and device level, we comprehensively conclude the dominant mechanisms for reconfigurability, categorized into ion migration, carrier migration, phase transition, spintronics, and photonics. Integration‐level developments for reconfigurable neuromorphic computing are also exhibited. Finally, a perspective on the future challenges for reconfigurable neuromorphic computing is discussed, definitely expanding its horizon for scientific communities.This article is protected by copyright. All rights reserved

show abstract

“…loop currents, in SCE requires larger cell areas than charge-based information encoding in CMOS [3]. Nevertheless, we believe that there are many interesting applications for SCE, e.g., digital signal processing, quantum computing, and neuromorphic computing [9], if its integration scale could be increased to about a hundred million JJs per chip, corresponding to over ten million artificial neurons or logic gates if classical computing is concerned.…”

Section: Introductionmentioning

confidence: 99%

Progress Toward Superconductor Electronics Fabrication Process With Planarized NbN and NbN/Nb Layers

Tolpygo

Mallek

Bolkhovsky

et al. 2023

IEEE Trans. Appl. Supercond.

View full text Add to dashboard Cite

In order to increase circuit density of superconductor digital and neuromorphic circuits by 10× and reach integration scale of 10 8 Josephson junctions (JJs) per chip, we developed a new fabrication process on 200-mm wafers, using self-shunted Nb/Al-AlOx/Nb JJs and kinetic inductors for cell miniaturization. The process has one layer of JJs, one layer of resistors, and ten fully planarized superconducting layers: 8 niobium layers and two layers of high kinetic inductance materials, Mo2N and NbN, with sheet inductance of 8 pH/sq and 3 pH/sq, respectively. The minimum linewidth of NbN kinetic inductors is 250 nm. NbN films were deposited by two methods: with 𝑻𝑻 𝒄𝒄 ≈15.5 K by reactive sputtering of a Nb target in Ar+N2 mixture; with 𝑻𝑻 𝒄𝒄 in the range from 9 K to 13 K by plasmaenhanced chemical vapor deposition (PECVD) using Tris(diethylamido)(tert-butylimido)niobium(V) metalorganic precursor. PECVD of NbN was investigated to obtain conformal deposition and filling narrow trenches and vias with high depth-to-width ratios, h/w>1, which was not possible to achieve using sputtering and other physical vapor deposition (PVD) methods at temperatures below 200 o C required to prevent degradation of Nb/Al-AlOx/Nb junctions. Nb layers with 200 nm thickness are used in the process layer stack as ground planes to maintain a high level of interlayer shielding and low intralayer mutual coupling, for passive transmission lines with wave impedances matching impedances of JJs, typically ≤50 Ω, and for low-value inductors. NbN and NbN/Nb bilayer are used for cell inductors. Using NbN/Nb bilayers and individual pattering of both layers to form inductors allowed us to minimize parasitic kinetic inductance associated with interlayer vias and connections to JJs as well as to increase critical currents of the vias. Fabrication details and results of electrical characterization of NbN films, wires, and vias, and comparison with Nb properties are given.

show abstract

SuperMind: a survey of the potential of superconducting electronics for neuromorphic computing

Cited by 40 publications

References 115 publications

A Survey on Symmetrical Neural Network Architectures and Applications

A Survey on Symmetrical Neural Network Architectures and Applications

Reconfigurable Neuromorphic Computing: Materials, Devices, and Integration

Progress Toward Superconductor Electronics Fabrication Process With Planarized NbN and NbN/Nb Layers

Contact Info

Product

Resources

About