1995
DOI: 10.1109/16.398666
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Suppression of boron penetration in BF/sub 2/-implanted p-type gate MOSFET by trapping of fluorines in amorphous gate

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Cited by 20 publications
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“…Although we did the work on a 0.8 µm CMOS technology, other technologies use stacked amorphous-Si on poly-Si layers too 5 , so that our analysis and conclusions can be applied to these cases also.…”
Section: Discussionmentioning
confidence: 99%
“…Although we did the work on a 0.8 µm CMOS technology, other technologies use stacked amorphous-Si on poly-Si layers too 5 , so that our analysis and conclusions can be applied to these cases also.…”
Section: Discussionmentioning
confidence: 99%