Surface‐Modified High‐k Oxide Gate Dielectrics for Low‐Voltage High‐Performance Pentacene Thin‐Film Transistors

Abstract

In this study, pentacene thin‐film transistors (TFTs) operating at low voltages with high mobilities and low leakage currents are successfully fabricated by the surface modification of the CeO2–SiO2 gate dielectrics. The surface of the gate dielectric plays a crucial role in determining the performance and electrical reliability of the pentacene TFTs. Nearly hysteresis‐free transistors are obtained by passivating the devices with appropriate polymeric dielectrics. After coating with poly(4‐vinylphenol) (PVP), the reduced roughness of the surface induces the formation of uniform and large pentacene grains; moreover, –OH groups on CeO2–SiO2 are terminated by C6H5, resulting in the formation of a more hydrophobic surface. Enhanced pentacene quality and reduced hysteresis is observed in current–voltage (I–V) measurements of the PVP‐coated pentacene TFTs. Since grain boundaries and –OH groups are believed to act as electron traps, an OH‐free and smooth gate dielectric leads to a low trap density at the interface between the pentacene and the gate dielectric. The realization of electrically stable devices that can be operated at low voltages makes the OTFTs excellent candidates for future flexible displays and electronics applications.

Temperature gradient approach to grow large, preferentially oriented 6,13-bis(triisopropylsilylethynyl) pentacene crystals for organic thin film transistors

“…25 The absence of surface treatments is considered to be one of the main reasons that the extracted mobilities were lower than previously reported values. 26 In addition, thermal cracking was observed in the TIPS pentacene films when temperature gradients were applied, as shown in Fig. 7.…”

High Capacitance Dielectrics for Low Voltage Operated OFETs

“…It was found that adding the extra insulator layer to the high-k dielectric increased its overall thickness and therefore decreased the gate capacitance, but because of low threshold voltage (V T = À0.55 V), 1 V OFET operation was still possible. The same approach toward the gate dielectric engineering for low voltage OFETs was reported in [70,71]. Table 4 summarizes the key parameters of all above-discussed OFETs.…”

Aluminium oxide prepared by UV/ozone exposure for low-voltage organic thin-film transistors

“…Here transistors with low operating voltages and high transconductance are needed for battery-operated applications. Several groups reported low-voltage organic thin-film transistors (OTFTs) by employing various ultra-thin gate dielectrics [1][2][3][4][5][6][7][8][9]. Here, the main dielectric requirements are low leakage current, high capacitance and breakdown voltage in excess of 5 V.…”