Surface-Passivation Effects on the Performance of 4H-SiC BJTs

et al. 2015

MSF

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Abstract.A single-mask junction termination extension with trench structures is formed to realize a 4.5 kV implantation-free 4H-SiC bipolar junction transistor (BJT). The trench structures are formed on the base layer with dry etching using a single mask. The electric field distribution along the structure is controlled by the number and dimensions of the trenches. The electric field is distributed by the trench structures and thus the electric field crowding at the base and mesa edges is diminished. The design is optimized in terms of the depth, width, spacing, and number of the trenches to achieve a breakdown voltage (V B ) of 4.5 kV, which is 85% of the theoretical value. Higher efficiency is obtainable with finer lithographic resolution leading to smaller pitch, and higher number and narrower trenches. The specific on-resistance (R ON ) of 20 mΩ.cm 2 is measured for the small-area BJT with active area of 0.04 mm 2 . The BV-R ON of the fabricated device is very close to the SiC limit and by far exceeds the best SiC MOSFETs.

Section: Resultsmentioning

confidence: 98%

4.5-kV 20-mΩ.cm<sup>2</sup> Implantation-Free 4H-SiC BJT with Trench Structures on the Junction Termination Extension

Elahipanah

Salemi

et al. 2015

MSF

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“…Among the 26 measured ST-JTE devices, 80% blocks more than 4.5 kV and the yield of high blocking ST-JTE BJTs (> 5 kV) is about 55%. The influence of charges at the oxide/SiC interface on the breakdown voltage of SiC devices has been reported [15]. The amount of charges in a certain area varies by forming the trenches.…”

Section: Resultsmentioning

confidence: 99%

5.8-kV Implantation-Free 4H-SiC BJT With Multiple-Shallow-Trench Junction Termination Extension

Elahipanah

Salemi

IEEE Electron Device Lett.

et al. 2015

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PostprintThis is the accepted version of a paper published in IEEE Electron Device Letters. This paper has been peer-reviewed but does not include the final publisher proof-corrections or journal pagination.Citation for the original published paper (version of record):Elahipanah, H., Salemi, A., Zetterling, C-M., Östling, M. (2015) 5.8-kV Implantation-Free 4H-SiC BJT With Multiple-Shallow-Trench Junction Termination Extension. IEEE Electron Device Letters IndexTerms-4H-SiC, multiple-shallow-trench JTE, implantation-free, high-voltage BJT.

“…The physical models used in the simulations are described in Ref. [1].The concentration of the interface traps and negative charges have been added in the models using the values extracted from the CV measurements. The values have been implemented for both the JTEs in Dielectric Region 2 (see Fig.…”

Section: Simulationmentioning

confidence: 99%

“…However, these devices suffer from lower breakdown voltage due to the presences of fixed oxide charges, which strongly affects the design of the high-voltage junction termination extension (JTE) [1]. Various methods have been used to reduce the presences of high density of surface states at the interface of SiO 2 /4H-SiC [2,3], for instance the use of N implantation at the interface of thermally grown SiO 2 /4H-SiC.…”

Section: Introductionmentioning

confidence: 99%

Tailoring the Interface between Dielectric and 4H-SiC by Ion Implantation

Suvanam

Martin

et al. 2015

MSF

Self Cite

Abstract. In this paper, the effect of carbon (C), silicon (Si) and nitrogen (N) implantation on the interface properties of 4H-SiC/SiO 2 and the implications for 4H-SiC bipolar junction transistors (BJT) passivation are discussed. 4H-SiC epi-layer have been implanted with 12 C, 14 N and 28 Si ion at three different doses with energies of 3, 3.5 and 6 keV, respectively, resulting in a projected range of 8 nm for the three ions. Then metal oxide semiconductor (MOS) structures with SiO 2 as dielectric have been fabricated. Capacitance voltage measurements show an increase in the negative fixed charges for all the implanted samples as a function of implantation induced damage. Similarly, in the case of C and Si, the surface roughness increases as a function of dose and the mass of the ions. No reduction of D it s due to the implantations is seen for any of the ions. Furthermore, TCAD device simulations of npn bipolar junction transistors (BJT), using the interface and fixed charges extracted from CV measurements, show a way to further optimize current gain and breakdown properties for the BJT.