Symbol Shifting: Tolerating More Faults in PCM Blocks

Abstract

Phase-change memory (PCM) has emerged as a candidate that overcomes the physical limitations faced by DRAM and NAND flash memory. While PCM has desirable properties in terms of scalability and density, it suffers from limited endurance. Repeated writes cause PCM cells to wear out and get permanently stuck at a specific value. Recovering from stuck-at faults through a proactive error correcting scheme is essential for the widespread adoption of PCM.In this paper, we propose Symbol Shifting as a practical technique to increase the number of faults that an error correcting code can cover in single and multilevel cells memory chips. Since stuck-at cells can still be read, errors are manifested only when a worn-out cell is to be programmed with a symbol value different than the value it is stuck at. After a write operation fails for a given block of data, another write operation is attempted with all original data symbols shifted to another memory level. Shifting the data is likely to bring the number of errors within the nominal capability of the deployed error correcting code. Requiring only one additional auxiliary cell, Symbol Shifting can increase the number of faults that an error correcting code can cover by up to double the nominal capability and extends the lifetime by up to 37%.

Ecs

“…Initial solutions to counter hard errors in NVMs included conventional ECCs (e.g., SEC-DED, BCH, etc. ), followed by ECC-based data inversion (Maddah et al 2013) and its extension as symbol shifting (Maddah et al 2016). These techniques encode data to reduce the number of errors per write and consequently improve the strength of the underlying ECC.…”

“…The main drawbacks of ECC-and ECP-based error correction techniques can be summarized as follows. First, techniques that rely on ECC (Lin and Costello 2004;Maddah et al 2013Maddah et al , 2016 have to update the error-correcting bits whenever the data protected by those bits changes. This increases the wear of the cells in which error-correcting bits are stored.…”