Synaptic Transistor Arrays Based on PVA/Lignin Composite Electrolyte Films

Zhang, Wenkui; Li, Jun; Lü, Cheng; Shi, Wenhui; Lei, Yuxing; Wen, Shengkai; Wang, Fei; Jiang, Jiewei; Wen, Pan; Zhang, Jianhua

doi:10.1109/ted.2023.3265940

Cited by 6 publications

(3 citation statements)

References 30 publications

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“…Based on the unique design of our device structure, the lowest power consumption of our device is as minimal as 584 pJ per event (Figure 4j) according to the equation of E = I peak × V × t, where I peak , V, and t represent the maximum photoresponse current, operating voltage, and light pulse duration, respectively. Although this value obtained at 5 V is lower than conventional CMOS and most of the reported neuromorphic devices (Figure 4k and Table S3, Supporting Information), [66][67][68][69][70][71] it is still higher than biological synapses and some devices with ultra-low power consumption [72][73][74][75][76] due to the high bias voltage and photocurrent. Therefore, in terms of power consumption, it may be more advantageous in reducing power consumption if the device can act as an NVS at low voltages.…”

Section: Resultsmentioning

confidence: 90%

Dual‐Mode Conversion of Photodetector and Neuromorphic Vision Sensor via Bias Voltage Regulation on a Single Device

Feng,

Li,

Feng

et al. 2023

Advanced Materials

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Simultaneous implementation of photodetector and neuromorphic vision sensor (NVS) on a single device faces a great challenge, due to the inherent speed discrepancy in their photoresponse characteristics. In this work, a trench‐bridged GaN/Ga2O3/GaN back‐to‐back double heterojunction array device is fabricated to enable the advanced functionalities of both devices on a single device. Interestingly, the device shows fast photoresponse and persistent photoconductivity behavior at low and high voltages, respectively, through the modulation of oxygen vacancy ionization and de‐ionization processes in Ga2O3. Consequently, the role of the optoelectronic device can be altered between the photodetector and NVS by simply adjusting the magnitude of bias voltage. As a photodetector, the device is able to realize fast optical imaging and optical communication functions. On the other hand, the device exhibits outstanding image sensing, image memory, and neuromorphic visual pre‐processing as an NVS. The utilization of NVS for image pre‐processing leads to a noticeable enhancement in both recognition accuracy and efficiency. The results presented in this work not only offer a new avenue to obtain complex functionality on a single optoelectronic device but also provide opportunities to implement advanced robotic vision systems and neuromorphic computing.

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Section: Resultsmentioning

confidence: 90%

Dual‐Mode Conversion of Photodetector and Neuromorphic Vision Sensor via Bias Voltage Regulation on a Single Device

Feng,

Li,

Feng

et al. 2023

Advanced Materials

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“…[18] Figure 9 summarizes relationship between PPF and mobility of neuromorphic transistors (namely, EDL-based transistors). [19,32,34,51,59,60] Details of the key parameters including PPF index, mobility, subthreshold swing, and energy consumption are also presented in Table S2, Supporting Information. It is worth noting that our c-PVP/ZnON devices exhibit superior performance among the compared neuromorphic EDL-based transistors.…”

Section: Resultsmentioning

confidence: 99%

Realization of High Mobility Synaptic Transistor through Control of Cross‐Linking Agent in a Polymer Dielectric Layer for Emerging Electric Double Layer

Kim,

Yun

et al. 2024

Adv Materials Technologies

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The development of high‐mobility neuromorphic transistors is essential to increase signal transmission speed and solve the von Neumann bottleneck issue. Herein, this work proposes cross‐linked Poly(4‐vinylphenol) (c‐PVP) as a dielectric layer to form an electric double layer (EDL), which plays a key role in synaptic transistors, and measure the ratio‐dependent characteristics of cross‐linking agents in c‐PVP. When the ratio of PVP to poly(melamine‐co‐formaldehyde) methylated (PMF) is 10:1, neuromorphic transistors is found to show the best performance with a memory window of 2.2 V and a mobility of 93.4 cm2 V−1 s−1. Fourier‐transform infrared spectroscopy (FT‐IR) results show that the reduction in the concentration of the cross‐linking agent generates more hydroxyl groups within the c‐PVP film. The 10:1 c‐PVP‐based synaptic device has an ultra‐low energy consumption of 15.8 pJ for a single pulse and a maximum paired pulse facilitation (PPF) index value of 291%. Additionally, synaptic characteristics, such as pulse duration time dependent plasticity, pulse intensity dependent plasticity, pulse rate dependent plasticity (SRDP), high band filtering, and short‐term memory (STM) conversion to long‐term memory (LTM), are also described and discussed. These results suggest that c‐PVP/ZnON‐based neuromorphic devices can be promising artificial synapses for memory and learning capabilities.

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“…[26] There is less emphasis on the fabrication of large-scale, high-density arrays of EGTs, which are essential for the implementation of integrated applications. [27,28] Many of the reported EGTs currently use organic or liquid electrolytes, posing significant challenges for manufacturing methods predominantly based on photolithography. [29][30][31] For instance, photolithography can damage organic solid-state electrolytes.…”

Section: Introductionmentioning

confidence: 99%

Electrolyte‐Gated Transistor Array (20 × 20) with Low‐Programming Interference Based on Coplanar Gate Structure for Unsupervised Learning

Zhang,

Li,

et al. 2024

Small Science

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Compute‐in‐memory (CIM) is a pioneering approach using parallel data processing to eliminate traditional data transmission bottlenecks for faster, energy‐efficient data handling. Crossbar arrays with two‐terminal devices such as memristors and phase‐change memory are commonly employed in CIM, but they encounter challenges such as leakage current and increased power usage. Three‐terminal transistor arrays have potential solutions, yet large‐scale electrolyte‐gated transistors (EGTs) demonstrations are uncommon due to compatibility issues with existing photolithography processes. Herein, a 20 × 20 EGTs array is designed using indium‐gallium‐zinc‐oxide as the semiconductor channel and polyacrylonitrile (PAN) doped with C2F6LiNO4S2 as the electrolyte. Each transistor unit in the array can serve as a synapse, exhibiting a large conductance range, low energy consumption (6.984 fJ) for read–write operations, excellent repeatability, and quasilinear update characteristics. It has been confirmed that the EGTs array not only enables precise device programming but also virtually eliminates signal interference between neighboring devices during the programming process. Using 54 transistors in the EGTs array, unsupervised learning with a winner‐takes‐all neural network is successfully demonstrated. After 50 training iterations, the neural network achieves perfect 100% accuracy in classifying test‐set letters. The work demonstrates the potential of EGTs for constructing large‐scale integration synaptic array toward efficient computing architectures.

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Synaptic Transistor Arrays Based on PVA/Lignin Composite Electrolyte Films

Cited by 6 publications

References 30 publications

Dual‐Mode Conversion of Photodetector and Neuromorphic Vision Sensor via Bias Voltage Regulation on a Single Device

Dual‐Mode Conversion of Photodetector and Neuromorphic Vision Sensor via Bias Voltage Regulation on a Single Device

Realization of High Mobility Synaptic Transistor through Control of Cross‐Linking Agent in a Polymer Dielectric Layer for Emerging Electric Double Layer

Electrolyte‐Gated Transistor Array (20 × 20) with Low‐Programming Interference Based on Coplanar Gate Structure for Unsupervised Learning

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