2016
DOI: 10.1080/00387010.2016.1167086
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Synthesis, annealing, characterization, and electronic properties of thin films of a quaternary semiconductor; copper zinc tin sulfide

Abstract: Copper zinc tin sulfide thin films were successfully prepared by spin coating on Molybdenum coated glass substrates. The as-deposited thin films were annealed at 400°C, 450°C and 500 °C in an Argon atmosphere for 1 hour. X-ray diffraction studies revealed that the thin films present the kësterite phase. The band gap decreased with increasing annealing temperature. Schottky barrier-type structures were fabricated and showed a rectifying behavior. The estimated values of the barrier height, the built involtage, … Show more

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Cited by 11 publications
(8 citation statements)
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“…It is important to mention that the effect of mild thermal annealing was to change the response from ohmic to diode behavior, since only 5 min at a relatively low temperature was needed to produce a better diffusion between the semiconductors to improve the p-n junction. According to Figure 7b, the forward bias of the diode response was in the order of 0.8 V, and the current-voltage characteristics were analyzed by using the modified Shockley model [29][30][31]:…”
Section: Electrical Responsementioning
confidence: 99%
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“…It is important to mention that the effect of mild thermal annealing was to change the response from ohmic to diode behavior, since only 5 min at a relatively low temperature was needed to produce a better diffusion between the semiconductors to improve the p-n junction. According to Figure 7b, the forward bias of the diode response was in the order of 0.8 V, and the current-voltage characteristics were analyzed by using the modified Shockley model [29][30][31]:…”
Section: Electrical Responsementioning
confidence: 99%
“…The difference in the ideality factor may be attributed to the diffusion between ITO (500 nm) and CdS (100 nm) layers, which could form a deep combination among the metallic oxide and semiconductor behaving as a metal oxide semiconductor (MOS) hybrid layer, that together with PbSe produce a heterostructure with an ideality factor η > 2, that is categorized as a Schottky diode according to the literature. Also, ideality η > 2 can be attributed to defects and imperfections that affect the recombination current, which does not flux homogeneously at the junction and to the presence of trapping levels within the depletion region, interfacial states, or the existence of other conduction mechanisms [29,[31][32][33].…”
Section: Ideality Factormentioning
confidence: 99%
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“…The ZnS secondary phase Raman peaks located at 271 cm −1 and 352 cm −1 were not observed which further confirms the formation of a good quality single phase CZTS. Also, there is no evidence for Cu2-xS secondary phase at 475 cm -1 [18,25,[32][33][34]. Figure 10.…”
Section: Annealing Effect Under Different Ramping Ratesmentioning
confidence: 99%
“…1/(C/A) 2 → 0 (or C → ∞) with low forward bias led to a built-in potential around Vbi = 950 mV for hotplate device and Vbi = 1850 mV for the non-hotplate device. It is well known that the built-in potential is directly proportional to the value of band bending in CZTS layer near the interface, and generally estimation of Vbi is not very accurate when doping is low in thin films[23,24]. It is observed that for the non-hotplate solar cell, CV data shows that unchanged when reverse bias is greater than 1V (see inset), suggesting that the CZTS film is completely depleted due to the thin nature of the layer.The width of the depletion zone W was determined by measuring the capacitance and net doping density 𝑁 𝐴 −𝑁 𝐷 obtained from the derivative through the following equation:For low forward bias, capacitance of CZTS/CdS junction dominates and therefore |𝑁 𝐴 −𝑁 𝐷 | corresponds to a region close to CdS, so built-in potencial is Vbi =1.85V and 0.95V for hotplate and non-hotplate devices, respectively.…”
mentioning
confidence: 99%