Synthesis of low-overhead configurable source routing tables for network interfaces

Loi,; Angiolini,; Benini,

doi:10.1109/date.2009.5090668

Cited by 22 publications

(8 citation statements)

References 19 publications

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“…We also estimated that each routing table requires 450 cycles to update, representing a serial write process for 15 routes of 15 hops each, writing 2 bits per hop [49]. In these experiments the network discovery period starts when the fault is injected to demonstrate the worst-case performance of our solution.…”

Section: E Runtime Faulty Behaviormentioning

confidence: 99%

Cardio: CMP Adaptation for Reliability Through Dynamic Introspective Operation

Pellegrini

Bertacco

2014

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-A modern digital system includes in a single chip many components: processing cores, large caches, memory controllers, and hardware accelerators. Looking forward, future semiconductor technologies will enable even higher device integration, overall increasing system performance while reducing energy consumption. Unfortunately, prominent experts agree that such technologies will be prone to both permanent and transient faults within their lifetime. With the goal of addressing this issue, we propose Cardio: a low-cost architecture for reliable chip multiprocessors. Our solution is based on a novel hardware/software co-design where silicon failures are detected in hardware and system reconfiguration is managed in software. Comparing Cardio with a state-of-the-art hardwarebased resiliency solution, Immunet, we found that our design can achieve a comparable fault response time while requiring a much lower area overhead. The proposed solution relies on a distributed resource manager to collect information about a CMP component's health, and leverages a synchronized distributed control mechanism to recover from permanent failures. Such architecture can operate as long as at least one general-purpose processor is still functional. Our experimental evaluation indicates that the overall performance impact of Cardio is as low as 4.5%, and its dynamic reconfiguration time upon fault detection is comprised between 20 and 50 thousand cycles.

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Section: E Runtime Faulty Behaviormentioning

confidence: 99%

Cardio: CMP Adaptation for Reliability Through Dynamic Introspective Operation

Pellegrini

Bertacco

2014

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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“…In [14], authors propose a synthesis approach that, depending on the degree of routing flexibility, can significantly reduce the area cost of fully reprogrammable routing tables by adopting partially reprogrammable routing logic. This solution implements configurable routing, which allows bypassing faulty nodes or links without impacting the consistency of traffic flows.…”

Section: Related Workmentioning

confidence: 99%

Efficient Routing in Heterogeneous SoC Designs with Small Implementation Overhead

Cano

Flich

Roca

et al. 2014

IEEE Trans. Comput.

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Abstract-In application-specific SoCs, the irregularity of the topology ends up in a complex and customized implementation of the routing algorithm, usually relying on routing tables implemented with memory structures at source end nodes. As system size increases, the routing tables also increase in size with non-negligible impact on power, area and latency overheads. In this paper we present a routing implementation for application-specific SoCs able to implement in an efficient manner (with no routing tables and using a small logic block in every switch) a deadlock-free routing algorithm in these irregular networks. The mechanism relies on a tool that maps the initial irregular topology of the SoC system into a logical regular structure where the mechanism can be applied. We provide details for both the mapping tool and the proposed routing mechanism. Evaluation results show the effectiveness of the mapping tool as well as the low area and timing requirements of the mechanism. With the mapping tool and the routing mechanism complex irregular SoC topologies can now be supported without the need of routing tables.

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“…Through native execution profiling, we found that the time required for the distributed resource manager to recompute the routing tables is approximately constant at 10,000 cycles. We also computed that each routing table requires 450 cycles to update, representing a serial write process for 15 routes of 15 hops each, writing 2 bits per hop [18]. We began the network discovery period at the time of fault injection to demonstrate the worst-case performance of our solution.…”

Section: Dynamic Fault Behaviormentioning

confidence: 99%

Cardio: Adaptive CMPs for reliability through dynamic introspective operation

Pellegrini

Bertacco

2011

2011 IEEE International High Level Design Validation and Test Workshop

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Abstract-Current technology scaling enables the integration of tens of processing elements into a single chip, and future technology nodes will soon allow the integration of hundreds of cores per device. While very powerful, many experts agree that these systems will be prone to a significant number of permanent and transient faults during their lifetime. If not properly handled, effects of runtime failures can be dramatic.In this work, we propose Cardio, a distributed architecture for reliable chip multiprocessors. Cardio, a novel approach for onchip reliability is based on hardware detectors that spot failures and on software routines that reorganize the system to work around faulty components. Compared to previous online reliability solutions, Cardio provides failure reactivity comparable to hardware-only reliable solutions while requiring a much lower area overhead. Cardio operates a distributed resource manager to collect health information about components and leverages a robust distributed control mechanism to manage system-level recovery. Our architecture operational as long as at least one general purpose processor is still functional in the chip. We evaluated our design using a custom simulator and estimate its runtime impact on the SPECMPI benchmarks to be lower than 3%. We estimate its dynamic reconfiguration time to be comprised between 20 and 50 thousand cycles per failure.

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Synthesis of low-overhead configurable source routing tables for network interfaces

Cited by 22 publications

References 19 publications

Cardio: CMP Adaptation for Reliability Through Dynamic Introspective Operation

Cardio: CMP Adaptation for Reliability Through Dynamic Introspective Operation

Efficient Routing in Heterogeneous SoC Designs with Small Implementation Overhead

Cardio: Adaptive CMPs for reliability through dynamic introspective operation

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