System level fixed-point design based on an interpolative approach

Willems, M.; Bursgens, V.; Keding, Holger; Grotker, T.; Meyr, H.

doi:10.1145/266021.266105

Cited by 62 publications

(49 citation statements)

References 5 publications

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“…Moreover, global annotations can be defined in order to specify some rules for the entire system (maximal data wordlength, casting rules). The second step called interpolation [16][6] corresponds to the determination for each data of the word-length of the integer and fractional parts. The fixedpoint data formats are obtained from a set of propagation rules and the analysis of the program control flow.…”

Section: Related Workmentioning

confidence: 99%

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Automatic floating-point to fixed-point conversion for DSP code generation

Ménard¹,

Chillet²,

Charot³

et al. 2002

Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems - CASES '02

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The development of methodologies for the automatic implementation of floating-point algorithms in fixed-point architectures is required for the minimization of cost, power consumption and time to market of digital signal processing applications. In this paper, a new methodology of implementation in Digital Signal Processors (DSP) under accuracy constraint is presented. In comparison with the existing methodologies, the DSP architecture is completely taken into account for optimizing the execution time under accuracy constraint. The justification and the different stages of our methodology are presented.

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Section: Related Workmentioning

confidence: 99%

“…Thus, this technique can not be used if there is cycles in the graph like in the case of recursive structures. The determination of the data dynamic range in the tool FRIDGE [6] is based on this technique [16].…”

Section: Data Dynamic Range Determinationmentioning

confidence: 99%

Automatic floating-point to fixed-point conversion for DSP code generation

Ménard¹,

Chillet²,

Charot³

et al. 2002

Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems - CASES '02

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“…According to Willems et al [14], the implementation of algorithms for specific target machines requires a bit-true specification at source level. This specification can then be transferred into a HDL or a programming language.…”

Section: Related Workmentioning

confidence: 99%

Floating Point to Fixed Point Conversion of C Code

Cilio

Corporaal

1999

Lecture Notes in Computer Science

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Abstract. In processors that do not support floating-point instructions, using fixed-point arithmetic instead of floating-point emulation trades off computation accuracy for execution speed. This trade-off is often profitable. In many cases, like embedded systems, low-cost and speed bounds make it the only acceptable option. We present an environment supporting fixed-point code generation from C programs. It allows the user to specify the position of the binary point in the source code and let the converter automatically transform floating-point variables and operations. We demonstrate the validity of our approach on a series of experiments. The results show that, compared to floating-point, fixedpoint arithmetic executed on an integer datapath has a limited impact on the accuracy. In the same time the fixed-point code is 3 to 8 times faster than its equivalent floating-point emulation on an integer datapath.

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“…The work in this area can be classified in many different ways, and one such classification is static analysis versus dynamic analysis. Dynamic analysis [2]- [7] relies on the use of stimuli input signals. Though this approach provides bit widths closer to the optimal set for those particular stimuli when compared to static-analysis techniques, it can be problematic since a large set of stimuli signals is required to analyze a design with sufficient confidence, possibly leading to prohibitively long simulation times and without guarantees for alternative input stimuli encountered in practice.…”

mentioning

confidence: 99%

Accuracy-Guaranteed Bit-Width Optimization

Lee

Gaffar

Cheung

et al. 2006

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

181

168

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Abstract-An automated static approach for optimizing bit widths of fixed-point feedforward designs with guaranteed accuracy, called MiniBit, is presented. Methods to minimize both the integer and fraction parts of fixed-point signals with the aim of minimizing the circuit area are described. For range analysis, the technique in this paper identifies the number of integer bits necessary to meet range requirements. For precision analysis, a semianalytical approach with analytical error models in conjunction with adaptive simulated annealing is employed to optimize the number of fraction bits. The analytical models make it possible to guarantee overflow/underflow protection and numerical accuracy for all inputs over the user-specified input intervals. Using a stream compiler for field-programmable gate arrays (FPGAs), the approach in this paper is demonstrated with polynomial approximation, RGB-to-YCbCr conversion, matrix multiplication, B-splines, and discrete cosine transform placed and routed on a Xilinx Virtex-4 FPGA. Improvements for a given design reduce the area and the latency by up to 26% and 12%, respectively, over a design using optimum uniform fraction bit widths. Studies show that MiniBit-optimized designs are within 1% of the area produced from the integer linear programming approach.Index Terms-Field-programmable gate arrays (FPGAs), finite word-length effects, fixed-point arithmetic, optimization methods, simulated annealing (SA).

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System level fixed-point design based on an interpolative approach

Cited by 62 publications

References 5 publications

Automatic floating-point to fixed-point conversion for DSP code generation

Automatic floating-point to fixed-point conversion for DSP code generation

Floating Point to Fixed Point Conversion of C Code

Accuracy-Guaranteed Bit-Width Optimization

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