For the design of complex digital signal processing systems, block diagram oriented synthesis of real time software for programmable target processors has become an important design aid. The synthesis approach discussed in this paper is based on multirate block diagrams with scalable synchronous data ow (SSDF) semantics. For this class of data ow graphs we present s c heduling techniques for optimum data memory compaction. These techniques can be employed to map signals of a block diagram onto a minimum data memory space. In order to formalize the data memory compaction problem, we rst derive appropriate implementation measures. Based on these implementation measures it can be shown that optimum data memory compaction consists of optimum scheduling as well as optimum memory allocation. For the class of single appearance (SA) block diagrams with SSDF semantics, scheduling can be reduced to an integer linear programming (ILP) problem. Due to the computational complexity of ILP, w e also present a suboptimum scheduling selection criterion, which can be used for SA and non SA-schedulers.
The design process for xed-point implementations either in software or in hardware requires a bit-true specication of the algorithm in order to analyze quantization eects on an algorithmical level, abstracting from implementational details. On the other hand, system design starts from a oating-point description, so that a transformation of a oating-point description into a xed-point description becomes necessary. Within this paper we present a tool that allows an automated, interactive transformation from oating-point ANSI-C into a bit-true specication based on a new data type xed that is introduced as an extension to ANSI-C. The concept is rooted in a sophisticated data dependency analysis that allows to handle control structures as well as pointers. It is part of the xed-point design environment FRIDGE 1 which includes an advanced simulator that covers the extended ANSI-C syntax as well as target specic compilers which allow to generate ecient xed-point implementations either for HW or for SW, starting from the bit-true algorithm specication.
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