System-Level Leakage Variability Mitigation for MPSoC Platforms Using Body-Bias Islands

Abstract

Adaptive body biasing (ABB) is a popularly used technique to mitigate the increasing impact of manufacturing process variations on leakage power dissipation. The efficacy of the ABB technique can be improved by partitioning a design into a number of "body-bias islands," each with its individual body-bias voltage. In this paper, we propose a system-level leakage variability mitigation technique to partition a multiprocessor system into body-bias islands at the processing element (PE) granularity at design time, and to optimally assign body-bias voltages to each island post-fabrication. As opposed to prior gate-and circuit-level partitioning techniques that constrain the global clock frequency of the system, we allow each island to run at a different speed and constrain only the relevant system performance metrics-in our case the execution deadlines. Experimental results show the efficacy of the proposed methodology; we demonstrate up to 40% and 60% reduction in the mean and standard deviation of leakage power dissipation respectively, compared to a baseline system without ABB. Furthermore, the proposed design-time partitioning is, on average, 38 faster than a previously proposed Monte Carlo-based technique, while providing similar reductions in leakage power dissipation.Index Terms-Adaptive body-bias (ABB), leakage power dissipation, power management, process variations.

Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs

“…Due to the body effect of MOSFETs, the threshold voltage of a device is modulated by separately biasing its source and body terminals [14], [15]. Nevertheless, separately tuning threshold voltage of each transistor is hard to achieve with this approach due to the isolation restriction and the area overhead of additional circuits and routing resources [4].…”

“…Digital Object Identifier 10.1109/TCSI.2014.2333675 to achieve due to the area overhead of additional circuits and routing resources [4]. In order to achieve better electrostatic control and reduce short channel effects, FinFETs have been successfully used for the 22-nm technology node [5], [6].…”

Dual-threshold-voltage configurable circuits with three-independent-gate silicon nanowire FETs

“…However, the implementation of multi-V t circuits requires extra technological steps to build devices with different threshold voltages, which affects the layout regularity and increases the process costs compared to single-V t design [2]. Adaptive body biasing [3] is another popular technique to mitigate the increasing leakage power consumption, but separate body biasing for tuning threshold voltage of each transistor is hard to achieve due to the area overhead of additional circuits and routing resources [4].…”

On the Design of Real-Time Systems on Multi-Core Platforms under Uncertainty

“…The more islands that are partitioned, the better improvement that can be achieved. However, the computational complexity also increases exponentially [56,99,57]. In the extreme case, one core forms one island, and this may lead to unacceptable circuitry cost.…”

“…∆ i leak is a given constant that models the leakage power variations due to the impact of die-to-die (D2D) and within-die (WID) process variation [58].…”