Systematic methodology for optimizing the tradeoff of polysilicon depletion versus boron penetration in sub-0.18-μm surface-channel PMOS devices

Scott, G.; Saha, Samar K.; Olsen, C.; Nouri, F.; Lutze, J.; Rubin, M.; Manley, M.

doi:10.1117/12.360543

Cited by 9 publications

(11 citation statements)

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“…On the other hand, previous studies have revealed that the high level of mechanical compressive stress, resulting from the conventional high-density-plasma (HDP) shallow trench isolation (STI) gap filling process, significantly degrades the device performance, negating the benefits of strain technologies as the device active area shrinks, particularly for nMOSFETs. [5][6][7] Therefore, it is crucial to suppress the effect of STI-induced compressive stress on device performance. Recently, sub atmospheric chemical vapor deposition (SACVD) oxide has been developed as a standard shallow trench filling process to achieve a high-aspect-ratio gap-fill capability and to reduce the STI-induced compressive stress at the 45 nm node.…”

Section: Introductionmentioning

confidence: 99%

Impact of Reducing Shallow Trench Isolation Mechanical Stress on Active Length for 40 nm n-Type Metal–Oxide–Semiconductor Field-Effect Transistors

Huang

Lin

et al. 2011

Jpn. J. Appl. Phys.

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The electrical potential technique was applied to detect and locate impact damage in carbon fibre reinforced polymer (CFRP) plates of Hexcel T300/914 composite. The potential field across the surface of the laminates was measured using arrays of electrical contacts. A constant current of 100 mA was applied to the plate, and the changes in the potential distribution resulting from impact damage documented. These results have been compared with those calculated using 3D finite element simulation of current flow in CFRP laminates. The results show good agreement between simulation and experimental results and will permit detailed analytical studies of optimum network and current input configurations for the practical realization of a damage sensing system. A comparison of potential distribution on the top surface for damaged and undamaged laminates shows a substantial difference in the potential field around the impact damaged area. This could form the basis of a damage detection system.

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Section: Introductionmentioning

confidence: 99%

Impact of Reducing Shallow Trench Isolation Mechanical Stress on Active Length for 40 nm n-Type Metal–Oxide–Semiconductor Field-Effect Transistors

Huang

Lin

et al. 2011

Jpn. J. Appl. Phys.

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“…Another source is the layout dependence caused by shallow trench isolation (STI) stress. 1) In addition, stress enhancement technique is positively applied to increase the mobility of electrons and holes in advanced technology. There are some papers highlighting the concern that mechanical stress affects the integrity of gate oxide and the reliability of a device.…”

Section: Introductionmentioning

confidence: 99%

Impact of Mechanical Stress on Hot-Carrier Lifetime and Time-Dependent Dielectric Breakdown in Downscaled Complimentary Metal–Oxide–Semiconductor

Morifuji¹

2009

jjap

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The interactions of hot-carrier (HC) instability and time-dependent dielectric breakdown (TDDB) with mechanical stress are investigated intensively. We determined from experimental data that the hot-carrier injection in p-type metal-oxide-semiconductor field-effect transistors (PMOSFETs) occurs at the center of the channel under the most severe stress condition of V gs ¼ V ds and that a physical mechanism similar to negative bias temperature instability (NBTI) is responsible for degradation at room temperature, as confirmed from the result of hydrodynamic simulations. We demonstrated that mechanical stress resulting from the sidewall spacer accelerates this hot carrier degradation in short-channel PMOSFETs. This phenomenon is not observed in the n-type MOSFET (NMOSFET) case. We also observed that the anomalous degradation in TDDB for downsized NMOSFETs is caused by the compressive stress from shallow trench isolation (STI) and shows strong correlation with hydrogen processes. The optimization of hydrogen processes and mechanical stress is indispensable for a highly reliable system LSI in the future.

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“…Stress engineering related to the frontend process as well as the backend process of LSI is required. [1][2][3][4][5][6][7] As for shallow trench isolation (STI) structures, it was reported that a high stress field in the structure causes a variation in electrical characteristics, 8) suggesting that the estimation of stress fields in the devices is indispensable for successful LSI design and fabrication. Although stress fields or strains in a Si substrate can be detected by Raman spectroscopy or nanobeam diffraction (NBD), no effective technique has been reported for a measurement of nanoscale stress fields in a dielectric material that is used for STI filling.…”

Section: Introductionmentioning

confidence: 99%

Nanoscale Stress Field Evaluation with Shallow Trench Isolation Structure Assessed by Cathodoluminescence Spectroscopy, Raman Spectroscopy, and Finite Element Method Analyses

Kodera

Iguchi

Tsuchiya

et al. 2008

jjap

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Stress engineering related to the LSI process is required. With shallow trench isolation (STI) structures, a high stress field causes a variation in electrical characteristics. Although stress fields in a Si substrate can be detected by Raman spectroscopy, no effective technique has been reported for the measurement of nanoscale stress fields in a dielectric material used for STI filling. Recently, we have reported that ''cathodoluminescence (CL) spectroscopy'' enables us to detect nanometer-scale stress fields in LSI structures. In this study, we performed the first estimation of the stress fields with a STI structure by CL and Raman spectroscopy, as well as finite element method (FEM) calculation. We were able to repeatedly acquire clear stress distributions by CL and Raman spectroscopy. Moreover, CL, Raman, and FEM results showed excellent agreement with one another, revealing that a large variation in stresses along the AA/STI boundary was induced by the intrinsic tensile stress of the SiO 2 film.

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Systematic methodology for optimizing the tradeoff of polysilicon depletion versus boron penetration in sub-0.18-μm surface-channel PMOS devices

Cited by 9 publications

References 0 publications

Impact of Reducing Shallow Trench Isolation Mechanical Stress on Active Length for 40 nm n-Type Metal–Oxide–Semiconductor Field-Effect Transistors

Impact of Reducing Shallow Trench Isolation Mechanical Stress on Active Length for 40 nm n-Type Metal–Oxide–Semiconductor Field-Effect Transistors

Impact of Mechanical Stress on Hot-Carrier Lifetime and Time-Dependent Dielectric Breakdown in Downscaled Complimentary Metal–Oxide–Semiconductor

Nanoscale Stress Field Evaluation with Shallow Trench Isolation Structure Assessed by Cathodoluminescence Spectroscopy, Raman Spectroscopy, and Finite Element Method Analyses

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