Tamper Evident Microprocessors

Abstract

Abstract-Most security mechanisms proposed to date unquestioningly place trust in microprocessor hardware. This trust, however, is misplaced and dangerous because microprocessors are vulnerable to insider attacks that can catastrophically compromise security, integrity and privacy of computer systems. In this paper, we describe several methods to strengthen the fundamental assumption about trust in microprocessors. By employing practical, lightweight attack detectors within a microprocessor, we show that it is possible to protect against malicious logic embedded in microprocessor hardware.We propose and evaluate two area-efficient hardware methods -TRUSTNET and DATAWATCH -that detect attacks on microprocessor hardware by knowledgeable, malicious insiders. Our mechanisms leverage the fact that multiple components within a microprocessor (e.g., fetch, decode pipeline stage etc.) must necessarily coordinate and communicate to execute even simple instructions, and that any attack on a microprocessor must cause erroneous communications between microarchitectural subcomponents used to build a processor. A key aspect of our solution is that TRUSTNET and DATAWATCH are themselves highly resilient to corruption. We demonstrate that under realistic assumptions, our solutions can protect pipelines and on-chip cache hierarchies at negligible area cost and with no performance impact. Combining TRUSTNET and DATAWATCH with prior work on fault detection has the potential to provide complete coverage against a large class of microprocessor attacks. 1Index Terms-hardware security, backdoors, microprocessors, security based on causal structure and division of work.

VeriTrust: Verification for Hardware Trust

“…There have been some recent research efforts to achieve the above objectives via design obfuscation and/or isolation [19][20][21][22]. These solutions facilitate to mitigate some HT threats, but the associated design cost is quite high and there is no guarantee that ICs would be HT-free with these design methodologies.…”

Silencing Hardware Backdoors

“…Waksman and Sethumadhavan previously observed that there are finitely many types of deterministic, digital backdoor triggers that can be injected by an inside designer [26]. We leverage this observation and devise methods to disable all of these types of triggers by obfuscating or scrambling inputs supplied to the hardware units in order to prevent those units from recognizing triggers.…”

“…Waksman and Sethumadhavan proposed a different method that detects unusual hardware behavior at runtime using a self-monitoring on-chip network [26]. This method, like the previous one, focusses on detection (as opposed to prevention).…”

“…INTRODUCTION Malicious modifications to hardware from insiders pose a significant threat today [1,4,6,7,11,22,25,26,27]. The complexity of hardware systems and the large number of engineers involved in the designing of them pose a security threat because it is easy for one malicious individual to alter one tiny piece of the system.…”

Anonymity and Censorship Resistance in Unstructured Overlay Networks

“…Censorship at storage level consists in performing a selective filtering on the content of a peer and aims at blocking the resource as soon as its presence is detected. To avoid this type of attack, techniques such as replication of resources [5,11] and encryption of file chunks [19,30] have been proposed.…”