Task-based execution of synchronous dataflow graphs for scalable multicore computing

Georgakarakos, Georgios; Kanur, Sudeep; Lilius, Johan; Desnos, Karol

doi:10.1109/sips.2017.8110023

Cited by 4 publications

(4 citation statements)

References 16 publications

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“…In the experiments, to study the monitoring overhead for different actor granularities, two applications widely used by PREESM developers are tested, Sobel-morpho filter [22] and Stereo matching [4]. The former features simple actors (in terms of computational complexity) while the latter presents complex ones.…”

Section: Results: Tool Overhead Characterizationmentioning

confidence: 99%

PAPIFY: Automatic Instrumentation and Monitoring of Dynamic Dataflow Applications Based on PAPI

et al. 2019

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The widening of the complexity-productivity gap in application development witnessed in the last years is becoming an important issue for the developers. New design methods try to automate most designers tasks to bridge this gap. In addition, new Model of Computations (MoCs), as those dataflowbased, ease the expression of parallelism within applications, leading to higher designer productivity. Rapid prototyping design tools offer fast estimations of the soundness of design choices. A key step when prototyping an application is to have representative performance indicators to estimate the validity of those design choices. Such indicators can be obtained using hardware information, while new libraries, e.g., Performance Application Programming Interface (PAPI), ease the access to such hardware information. In this work, PAPIFY toolbox is presented as a tool to perform automatic PAPI-based instrumentation of dynamic dataflow applications. It combines PAPIFY with a dataflow Y-chart based design framework, which is called PREESM, and its companion run-time reconfiguration manager, which is called Synchronous Parameterized and Interfaced Dataflow Embedded Runtime (SPiDER). PAPIFY toolbox accounts for an automatic code generator for static and dynamic applications, a dedicated library to manage the monitoring at run-time and two User Interfaces (UIs) to ease both the configuration and the analysis of the captured run-time information. Additionally, its main advantages are 1) its capability of adapting the monitoring according to the system status and 2) adaptation of the monitoring accordingly to application workload redistribution in run-time. A thorough overhead characterization using Sobel-morpho and Stereo-matching dataflow applications shows that PAPIFY run-time monitoring overhead is up to 10%.

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Section: Results: Tool Overhead Characterizationmentioning

confidence: 99%

PAPIFY: Automatic Instrumentation and Monitoring of Dynamic Dataflow Applications Based on PAPI

et al. 2019

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“…That makes the approach hard to scale with a variable number of processing cores. The work in [4] proposes a methodology to use task programming models for code generation from SDF graphs. The concept, shown in Figure 2, is to bypass the bottleneck of the static scheduler and shift scheduling in runtime using task libraries.…”

Section: Task-based Code Generation In Preesmmentioning

confidence: 99%

“…spawn, steal and sync processes. Indeed, for graphs like in Figure 4, the spawning of tasks by following graph dependencies as in [4], places them into a single task dequeue, the one belonging to the host core i.e. the core that executes the main function.…”

Section: Task Recursionmentioning

confidence: 99%

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Recursive Task Generation for Scalable SDF Graph Execution on Multicore Processors

Georgakarakos

Lilius

2020

2020 28th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)

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Dataflow modelling is a popular technique for describing parallel algorithms. Using dataflow, algorithm parallelism can be modelled and analysed efficiently at a high level of abstraction. However, challenges arise when translating dataflow semantics into executable code, mainly due to scheduling and synchronization overheads. Invoking task programming models in order to generate efficient code from dataflow representations has been proposed as a promising methodology to optimise the translation process.In this paper, we propose recursive task execution as an optimisation for the dataflow-based code generation process. Our approach is based on extracting synchronous dataflow graph information in order to reduce scheduling overheads and improve load balancing when executing task-based code on multicore processors. We use PREESM dataflow-based prototyping framework to implement and test our concept. Results show that our proposed optimisation enhances code scalability therefore enabling higher application throughput.

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OpenVVC Decoder Parameterized and Interfaced Synchronous Dataflow (PiSDF) Model: Tile Based Parallelism

Haggui

Hamidouche

Belghith³

et al. 2022

J Sign Process Syst

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The emergence of the new video coding standard, Versatile Video Coding (VVC), has resulted in a 40-50% coding gain over its predecessor HEVC for the same visual quality. However, this is accompanied by a sharp increase in computational complexity. The emergence of the VVC standard and the increase in video resolution have exceeded the capacity of single-core architectures. This fact has led researchers to use multicore architectures for the implementation of video standards and to use the parallelism of these architectures for real-time applications. With the strong growth in both areas, video coding and multicore architecture, there is a great need for a design methodology that facilitates the exploration of heterogeneous multicore architectures, which automatically generates optimized code for these architectures in order to reduce time to market. In this context, this paper aims to use the methodology based on data flow modeling associated with the PREESM software. This paper shows how the software has been used to model a complete standard VVC video decoder using Parameterized and Interfaced Synchronous Dataflow (PiSDF) model. The proposed model takes advantage of the parallelism strategies of the OpenVVC decoder and in particular the tile-based parallelism. Experimental results show that the speed of the VVC decoder in PiSDF is slightly higher than the OpenVVC decoder handwritten in C/C++ languages, by up to 11% speedup on a 24-core processor. Thus, the proposed decoder outperforms the state-of-the-art dataflow decoders based on the RVC-CAL model.

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Task-based execution of synchronous dataflow graphs for scalable multicore computing

Cited by 4 publications

References 16 publications

PAPIFY: Automatic Instrumentation and Monitoring of Dynamic Dataflow Applications Based on PAPI

PAPIFY: Automatic Instrumentation and Monitoring of Dynamic Dataflow Applications Based on PAPI

Recursive Task Generation for Scalable SDF Graph Execution on Multicore Processors

OpenVVC Decoder Parameterized and Interfaced Synchronous Dataflow (PiSDF) Model: Tile Based Parallelism

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