Technical aspects of 〈$ \bf 11\bar 20 $〉 4H–SiC MOSFET processing

Abstract

In order to process n-type channel MOSFETs on 〈1120 〉-oriented 4H -SiC wafers one has to optimise, independently, many different steps. First is the growth of the active epitaxial layer, including the effect of p-type doping. Next is the oxidation and, finally, the n-type implantation for source and drain formation. In this work, we investigate the growth and doping of the p-type doped epitaxial layer on the 〈1120 〉oriented substrate using, both, SIMS, low temperature photoluminescence measurements and Hall effect measurement to control the final doping level. Next we investigate the change in oxidation kinetics with respect to the conventional 〈0001〉 surfaces. Finally, we evaluate the efficiency of implantation and annealing processes.

Process Optimisation for <11-20> 4H-SiC MOSFET Applications

“…In a previous work [3,4] we focussed on the growth of p-type epitaxial layers. Using SIMS, we could calibrate the deposition conditions and set a non-destructive LTPL (Low Temperature PhotoLuminescence) technique to get a quantitative estimate of the residual doping.…”