Temperature-Aware Persistent Data Management for LSM-Tree on 3-D NAND Flash Memory

Wang, Yi; Tan, Jiali; Mao, Rui; Li, Tao

doi:10.1109/tcad.2020.2982623

Cited by 16 publications

(9 citation statements)

References 32 publications

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“…Further on, NAND cells themselves can also be packed vertically, resulting in 3D NAND. This is a property that also should be addressed since the heat of one area also propagates vertically and can therefore increase the wear levelling of neighbouring cells [137].…”

Section: Flash Storagementioning

confidence: 99%

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Key-Value Stores on Flash Storage Devices: A Survey

Krijn¹,

Trivedi²

2022

Preprint

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Key-value stores (KV) have become one of the main components of the modern storage and data processing system stack. With the increasing need for timely data analysis, performance becomes more and more critical. In the past, these stores were frequently optimised to run on HDD and DRAM devices. However, the last decade saw an increased interest in the use of flash devices because of their attractive properties. Flash is cheaper than DRAM and yet has a lower latency and higher throughput than HDDs. This literature survey aims to highlight the changes proposed in the last decade to optimise key-value stores for flash devices and predict what role these devices might play for key-value stores in the future.

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Section: Flash Storagementioning

confidence: 99%

“…This necessitates moving data around to different places when using such technologies. Such optimisations for LSM-trees are proposed by Wang et al [137]. The lesson to learn here is that wear levelling issues can differ between devices and still needs to be accounted for.…”

Section: Access Patternsmentioning

confidence: 99%

Key-Value Stores on Flash Storage Devices: A Survey

Krijn¹,

Trivedi²

2022

Preprint

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“…Even though this work is done by measuring TEG of 3D NAND, the result for LM suppression of IP pattern can be solutions to reduce the system operations of 3D NAND chip. [8], [10].…”

Section: Figure 6 (A) 2-d Conduction Energy Band Diagram (Ec) Along the Channel Direction (A-a') And (B) The Vertical Direction (B-b')mentioning

confidence: 99%

“…Also, 5-(penta-level-cell, PLC) and 6-bits/cell (hexa-levelcell, HLC) have been newly demonstrated [6,7]. Data retention is one of the key challenges in realizing those future memory devices [8]- [10].…”

Section: Introductionmentioning

confidence: 99%

Extraction of Nitride Trap Profile in 3-D NAND Flash Memory Using Intercell Program Pattern

Park

Yoon

et al. 2021

IEEE Access

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The extraction of nitride trap density (Nt) filled with electrons emitted by thermal emission (TE) in the charge-trapping layer of 3-D NAND flash memory is demonstrated. The intercell program (IP) pattern was adopted to intentionally inject electrons into the intercell region to minimize the influence of lateral migration (LM) on the trap profiles. This was confirmed by the retention characteristics observed at 120 °C, where the charge loss is mainly caused by the TE of the trapped electrons in the nitride layer. The extracted peak value of Nt at EC-ET value of 1.20 eV using the IP pattern was as low as 1.01×10 19 cm -3 eV -1 , in the scan range of 0.96 eV to 1.27 eV. This value was 17% lower than that from the conventional adjacent cell program (P-P-P) pattern. Therefore, the IP pattern can be used in extracting trap profiles in the SiN layer in scaled 3-D NAND memories. INDEX TERMS 3D NAND flash memory, data retention, lateral migration, trap profilingThis work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.

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“…Because of the technology of 3-D NAND, some TLC products with corresponding technology have achieved the performance of MLC, which is what we often call 3-D TLC. The research on 3-D NAND flash memory is being carried out all over the world, both in application and technology [27]- [29].…”

Section: Introductionmentioning

confidence: 99%

Key Technology Practice of High-Speed Access and Research on the Temperature Dependence of Key Time Parameters Based on NAND Flash Memory

et al. 2021

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This paper focuses on the NAND flash memory as a data storage medium in the Internet of things data acquisition system, which plays an important role from beginning to end. The flow process of multi-channel sensor data sampling, holding, conversion, coding, and storage in the data acquisition system is described. The basic working principle and working process of NAND flash memory are introduced. Based on Interleaved Two-plane Program Technology, and the solution of burst massive throughput in high-speed data transmission is proposed. Compared with previously published papers, the temperature dependence of key time parameters of NAND flash memory is studied and analyzed under the condition of temperature change more concretely. The changing trend of three key time parameters of NAND type flash under different temperatures is analyzed by using appropriate test samples. At the same time, the analysis of the causes of reflection from the phenomenon is further expanded and discussed. The combination of theory and practice can provide powerful suggestions for more efficient and accurate application of NAND flash memory.INDEX TERMS NAND flash, interleave two-plane program, burst massive data, temperature dependence.

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Temperature-Aware Persistent Data Management for LSM-Tree on 3-D NAND Flash Memory

Cited by 16 publications

References 32 publications

Key-Value Stores on Flash Storage Devices: A Survey

Key-Value Stores on Flash Storage Devices: A Survey

Extraction of Nitride Trap Profile in 3-D NAND Flash Memory Using Intercell Program Pattern

Key Technology Practice of High-Speed Access and Research on the Temperature Dependence of Key Time Parameters Based on NAND Flash Memory

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