Temperature-dependent electron mobility in InAs nanowires

Abstract

Abstract. Effective electron mobilities are obtained by transport measurements on InAs nanowire field-effect transistors at temperatures ranging from 10 − 200 K. The mobility increases with temperature below ∼ 30 − 50 K, and then decreases with temperature above 50 K, consistent with other reports. The magnitude and temperature dependence of the observed mobility can be explained by Coulomb scattering from ionized surface states at typical densities. The behaviour above 50 K is ascribed to the thermally activated increase in the number of scatterers, although nanoscale confinement also plays a role as higher radial subbands are populated, leading to interband scattering and a shift of the carrier distribution closer to the surface. Scattering rate calculations using finite-element simulations of the nanowire transistor confirm that these mechanisms are able to explain the data.

Nb/InAs nanowire proximity junctions from Josephson to quantum dot regimes

“…Ar [26,27]. Devices d3 and d5 were on the same chip; otherwise each device is representative of a distinct fabrication run.…”

“…Table 1 reports the field effect mobilities µ obtained from transconductance measurements at T 50 K via the analysis given in Ref. [26]. The capacitance between the nanowire and the global backgate is estimated using a COMSOL model.…”

Probing the electrical transport properties of intrinsic InN nanowires

“…[19][20][21][22][23][24] To date, charge carrier transport properties of semiconductor nanowires are commonly studied through nanowire field-effect transistors. 7,8,20,[24][25][26][27][28][29][30] Alternatively, they can be obtained by nanoprobing an individual nanowire in a scanning electron microscope (SEM) environment. 19,[21][22][23] This nanoprobing technique provides the distinct advantage that the surface and interface properties of nanowires are not perturbed by any chemical treatment or photolithography process.…”

Evolution of morphology and microstructure of GaAs/GaSb nanowire heterostructures

“…Crystal structure is another main concern in III-V NWs, since structure polytypism [17][18][19] and planar defects (such as stacking defaults (SFs) and twins) have been popularly observed, which are unwanted for related device applications [20]. However, the well-controlled synthesis of III-V NWs with a pure wurtzite (WZ) or zinc blende (ZB) phase can also bring about new application possibilities, since different crystal structures can lead to different band gaps [21][22][23] and, in turn, different electronic and optical properties.…”