Temperature-Dependent Thermal Capacitance Characterization for SOI-MOSFETs

Abstract

Thermal capacitances are required to describe fast dynamic thermal behavior in SOI devices. This paper presents a physical model based on the AC technique, together with the characteristic thermal frequency determination through the frequency response of the output conductance, for calculating the thermal capacitance of single-finger and multi-finger SOI-MOSFETs. The model accounts for total gate width and substrate temperature, making evident the augmented thermal coupling when multi-fingers are used. Thermal capacitances and corresponding time constants, extracted from a variety of gate widths and number of fingers, are correctly predicted up to a substrate temperature of 150°C. Index Terms-electrothermal characterization, model, SOI-MOSFET, substrate temperature, thermal capacitance. I. INTRODUCTION ilicon-on-insulator (SOI) MOSFETs, having a buried oxide layer thicker than 100 nm, suffer from obstruction of the heat flow towards the substrate [1], [2]. This, together with the ultra-thin internal layers used at nanometer length scales, with a reduced thermal conductivity [3], [4], results in a remarkable self-heating effect, particularly in DC operation/biasing with relevant electrical power levels involved (as from dozens of mW [5]). This makes the design and configuration of terminals, acting as heat sinks, critical in SOI-MOSFET performance [1], [6]. The typical thermal model for the temperature rise in devices, induced by self-heating effects, consists of the equivalent circuit shown in Fig. 1, with the thermal resistance, Rth, and capacitance, Cth, being connected in parallel. This model is based on the following analogy between electrical

Gate Length-Dependent Thermal Impedance Characterization of PD-SOI MOSFETs

“…8 with symbols. Similar normalized thermal capacitances (1-27 nJ/ • C mm) were obtained in [1], [10], and [12] for RF SOI MOSFETs and 236 nJ/ • C mm in [16] for FinFETs.…”

“…The thermal capacitance is a volumetric physical property. Therefore, it is expected to increase with the length of the channel, similar to the linear increase observed with the gate width [10], [12]. Nevertheless, to the best of our knowledge, this dependence of the thermal capacitance of SOI MOSFETs has not yet been extracted using the measured characteristic thermal frequency or modeled.…”

“…where f th is the characteristic thermal frequency, for which the conductance is equal to the average of the dc conductance, g ddo , and the conductance without dynamic self-heating, g ddT [1], [12]. Therefore…”

“…Thus, the thermal capacitance per unit width can be linearly modeled with the gate length, as expected. When the gate width dependence observed in [12] is incorporated, we obtain the following expression:…”

“…In this study, the thermal impedance of multi-finger partially depleted (PD) SOI MOSFETs with different gate lengths is obtained with a methodology based on the ac technique [3] and the characteristic thermal frequency determined through the conductance frequency response [1], [12]. In addition, a model for the gate length dependence of the thermal impedance is proposed, with the aim of its implementation in circuit simulators.…”