Temperature Effect Inversion-Aware Power-Performance Optimization for FinFET-Based Multicore Systems

TEI-DTA: Optimizing a Vehicular Sensor Network Operating with Ultra-Low Power System-on-Chips

“…This phenomenon is called temperature effect inversion (TEI) [12], and a variety of state of the art low-power techniques have been published exploiting it [9,[12][13][14][15][16][17][18][19][20][21][22]. More precisely, TEI-aware voltage scaling (TEI-VS) techniques saved power without performance degradation of SoCs [9,[12][13][14][15], TEI-aware frequency upscaling (TEI-FS) showed that SoCs can operate in turbo mode with a linear increase in power consumption (and thus a very small increase in power consumption compared to the existing one) [16,17,23], and TEI-aware body biasing (TEI-BB) demonstrated that the low power potential utilizing the TEI phenomenon can be realized by further complementing TEI-VS and FS techniques [18,19]. In addition, recent research has confirmed the effectiveness of these methods on fabricated system-on-chips (SoCs) [9,[20][21][22].…”

Learning-based BTI stress estimation and mitigation in multi-core processor systems

“…The first source of total power consumption is from the dynamic power consumption, which is defined at the transistor level as follows [2]:…”

“…The second source is the static power consumption, which is defined at the transistor level as follows [2]:…”

“…However, for multi-core systems, the power cannot be simulated using the simplified models presented in (1) and (2) [2]. Instead, and with the help of performance counters, the instruction per cycle (IPC) per cores could represent the activity rate or the utilisation of the core that defined as the number of instructions executed and committed per clock cycle.…”