Terrestrial Neutron-Induced Failures in Semiconductor Devices and Relevant Systems and Their Mitigation Techniques

Kanekawa, Nobuyasu; Ibe, Eishi; Sügimura, Takashi; Uematsu, Yutaka

doi:10.1007/978-1-4419-6715-2_2

Cited by 5 publications

(6 citation statements)

References 26 publications

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“…The number for the items corresponds to the timing shown with the underlining in Figure 4. 1. After the cold start finishes normally, the initial system status in which the cdata, pdata 1 and pdata 2 are correct, and both pdata 1 and pdata 2 are valid.…”

Section: Resilience Strategymentioning

confidence: 99%

“…If a Micro Processor Unit (MPU) receives an external electric signal as noise, the system function will freeze or malfunction easily [1]. Therefore, a resilience strategy for the MPU in a non-human environment is needed so that the embedded system can continue working [2].…”

Section: Introductionmentioning

confidence: 99%

“…This resilience strategy is implemented as a system that works between the hardware and operating system. This system is named FUJIMI 1 . In the FUJIMI system, Non-Maskable Interrupts (NMI) and Reset signals (RST) are triggered [3] periodically to save data for backup and then the backup data is used to reset the MPU.…”

Section: Introductionmentioning

confidence: 99%

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Evaluation of A Resilience Embedded System Using Probabilistic Model-Checking

Fang

Yamagata

Oiwa

2014

Electron. Proc. Theor. Comput. Sci.

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If a Micro Processor Unit (MPU) receives an external electric signal as noise, the system function will freeze or malfunction easily. A new resilience strategy is implemented in order to reset the MPU automatically and stop the MPU from freezing or malfunctioning. The technique is useful for embedded systems which work in non-human environments. However, evaluating resilience strategies is difficult because their effectiveness depends on numerous, complex, interacting factors.In this paper, we use probabilistic model checking to evaluate the embedded systems installed with the above mentioned new resilience strategy. Qualitative evaluations are implemented with 6 PCTL formulas, and quantitative evaluations use two kinds of evaluation. One is system failure reduction, and the other is ADT (Average Down Time), the industry standard. Our work demonstrates the benefits brought by the resilience strategy. Experimental results indicate that our evaluation is cost-effective and reliable.

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Section: Resilience Strategymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Evaluation of A Resilience Embedded System Using Probabilistic Model-Checking

Fang

Yamagata

Oiwa

2014

Electron. Proc. Theor. Comput. Sci.

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“…Static segments were designed using a time-division multiple-access (TDMA) mechanism, and are accessed by time-triggering for safety-critical systems such as drive-by-wire, adaptive cruise control (ACC), and antilock braking systems (ABS) [ 4 , 5 ]. However, radiation, crosstalk, electromagnetic interference (EMI) and power supply noise in the environment cause a lot of interference for the vehicle network [ 6 ]. If a transient fault occurs, it will result in transmission delay, data loss, and a miscalculation in logic, which is very dangerous during driving.…”

Section: Introductionmentioning

confidence: 99%

A Reliability Scheduling Algorithm for the Static Segment of FlexRay on Vehicle Networks

Lee

Lin

Wang

et al. 2018

Sensors

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FlexRay is a next-generation in-vehicle communication protocol which works in real time with flexibility. The most common applications in FlexRay are high bandwidth. X-by-wire applications, such as brake by wire and throttle by wire. However, there is no mechanism which can prevent transient faults in the application layer of FlexRay. If a transient fault occurs during driving, this would be very dangerous; therefore, we propose a fast reliability scheduling algorithm (FRSA) to improve the communication reliability of FlexRay. The proposed method reduces the probability of transient faults in one clock cycle by using a retransmission mechanism to recover the transient errors, and further improves computational complexity using the lookup table method to ensure system reliability. In this paper, we analyze a related literature to establish the system reliability constraints needed to evaluate the necessary time and slot usage, and the proposed cost function is used to evaluate the performance and efficiency when the number of messages is increased. Experimental results show that the proposed FRSA reduces execution time by an average 70.76% and cost by an average 13.33% more than the other existing methods. This method can be useful to others, especially regarding research about periodic time-triggered communication systems.

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“…Another concern is that a static random-access memory (SRAM)-based FPGA is vulnerable to soft errors caused by a single-event upset (SEU) regarding radiation of cosmic rays [17]. Particularly, neutrons are recognized as a major cause of soft errors for microelectronics on ground.…”

mentioning

confidence: 99%

Design Method for Online Totally Self-Checking Comparators Implementable on FPGAs

Kanno

Toba

Shimamura

et al. 2020

IEEE Trans. VLSI Syst.

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In this article, we propose a method for designing online totally self-checking (TSC) comparators for TSC systems implementable on field-programmable gate arrays (FPGAs). This method can be used to conduct exhaustive online diagnostics of each lookup table (LUT), which involves mapping the fundamental components of the comparator, with a small number of test patterns by directly measuring output of each LUT. Our method drastically reduces the number of test patterns for exhaustive diagnosis on the order of the input number n [O(n)] (n is the input number to the comparator) while maintaining 100% coverage, even if we only know the specifications of the LUT without knowing its detailed structure. FPGAs will be easily applicable to systems that require high dependability. To confirm the soft error rate (SER) in a static random-access memory (SRAM)-based FPGA, we also conducted an experiment involving a single-event upset (SEU) caused by neutron radiation. For this experiment, we designed an FPGA implementation of 1575 identical dual-modular-redundant TSC comparators. The experiment was conducted for 10.4 h, and 34 errors were observed regarding such failures in comparator function. The evaluated SER for the TSC comparator with the proposed method was 0.055 FIT at sea level of New York City.

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Terrestrial Neutron-Induced Failures in Semiconductor Devices and Relevant Systems and Their Mitigation Techniques

Cited by 5 publications

References 26 publications

Evaluation of A Resilience Embedded System Using Probabilistic Model-Checking

Evaluation of A Resilience Embedded System Using Probabilistic Model-Checking

A Reliability Scheduling Algorithm for the Static Segment of FlexRay on Vehicle Networks

Design Method for Online Totally Self-Checking Comparators Implementable on FPGAs

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