Test data compression

McCluskey, E.J.; Burek, D.; Koenemann, B.; Mitra, S.; Patel, J.H.; Rajski, J.; Waicukauski, J.A.

doi:10.1109/mdt.2003.1188267

Cited by 49 publications

(21 citation statements)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…10. As it has been explained in [15], much smaller test data storage results can be achieved if unspecified test cubes are handled. Therefore, we utilize ATPG tool to generate the test sets, and all the unspecified inputs are left unknown.…”

Section: Improved-seed-selection Algorithmmentioning

confidence: 99%

A test set embedding approach based on twisted-ring counter with few seeds

Zhou

et al. 2010

Integration

View full text Add to dashboard Cite

Section: Improved-seed-selection Algorithmmentioning

confidence: 99%

A test set embedding approach based on twisted-ring counter with few seeds

Zhou

et al. 2010

Integration

View full text Add to dashboard Cite

“…The lengths of the segments are 5, 7, 6, and 8, respectively. (1,2), (1,4), (2,3), (2,4), (3,4). Since there is no way that the 4 segments can be partitioned into two compatible classes, this test vector has to be scanned in serial mode.…”

Section: Two-way Partitions For Multicastingmentioning

confidence: 99%

“…In the compression architecture shown in Figure 2, a compressed vector is loaded from the automatic test equipment (ATE) into the decompressor, which feeds the decompressed vector into the scan chains. The amount of output response can also be reduced by output compression techniques [3], [4]. Illinois Scan Architecture (ISA) [5], as shown in Figure 3, can efficiently reduce test data volume and test application time.…”

Section: Introductionmentioning

confidence: 99%

Multi-Mode Segmented Scan Architecture with Layout-Aware Scan Chain Routing for Test Data and Test Time Reduction

Tsai

2006

2006 15th Asian Test Symposium

View full text Add to dashboard Cite

This paper presents a multi-mode segmented scan architecture. Three operation modes are supported: broadcast, multicast, and serial. Efficient test data compression can be achieved under this architecture with limited hardware overhead. An efficient two-way partitioning algorithm is given to construct multicastmode configurations. Finally, we present a layoutaware scan chain routing for test compaction, which has not yet explored by the researchers. Experimental results show that most of the serial scan operations can be replaced by multicast operations, and thus achieve much better compression rate.

show abstract

“…MISRs are also intolerant to test responses with unknown 'X' values, which arise from uninitialized flip-flop states. Additional circuitry must typically by included to mask off these 'X' values, increasing hardware cost [13].…”

Section: Introductionmentioning

confidence: 99%

Output compression for IC fault detection using compressive sensing

Tarsa

Kung

2012

MILCOM 2012 - 2012 IEEE Military Communications Conference

View full text Add to dashboard Cite

Abstract-The process of detecting logical faults in integrated circuits (ICs) due to manufacturing variations is bottlenecked by the I/O cost of scanning in test vectors and offloading test results. Traditionally, the output bottleneck is alleviated by reducing the number of bits in output responses using XOR networks, or computing signatures from the responses of multiple tests. However, these many-to-one computations reduce test time at the cost of higher detection failure rates, and lower test granularity. In this paper, we propose an output compression approach that uses compressive sensing to exploit the redundancy of correlated outputs from closely related tests, and of correlated faulty responses across many circuits. Compressive sensing's simple encoding method makes our approach attractive because it can be implemented on-chip using only a small number of accumulators. Through simulation, we show that our method can reduce the output I/O bottleneck without increasing failure rates, and can reconstruct higher granularity results off-chip than current compaction approaches.

show abstract

Test data compression

Cited by 49 publications

References 0 publications

A test set embedding approach based on twisted-ring counter with few seeds

A test set embedding approach based on twisted-ring counter with few seeds

Multi-Mode Segmented Scan Architecture with Layout-Aware Scan Chain Routing for Test Data and Test Time Reduction

Output compression for IC fault detection using compressive sensing

Contact Info

Product

Resources

About