Test features of the MC145472 ISDN U-transceivers

Bonet, L.A.; Ganger, J.; Girardeau, J.; Greaves, C.; Pendleton, M.; Yatim, D.

doi:10.1109/test.1990.114002

Cited by 3 publications

(1 citation statement)

References 5 publications

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“…Some analog and mixed-signal circuits require large numbers of specifications to be verified, where checking all specifications can result in prohibitive testing times on expensive automated test equipment [6], [13]. In this section the problem of minimizing the cost of production testing is considered, assuming that the circuit being tested has a predefined set of specifications that need to be measured, with prespecified binning limits, indicating limits for failed die and limits for various performance grades of good die.…”

Section: Reducing the Cost Of Production Testmentioning

confidence: 99%

A tutorial introduction to research on analog and mixed-signal circuit testing

Milor

1998

IEEE Trans. Circuits Syst. II

224

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Traditionally, work on analog testing has focused on diagnosing faults in board designs. Recently, with increasing levels of integration, not just diagnosing faults, but distinguishing between faulty and good circuits has become a problem. Analog blocks embedded in digital systems may not easily be separately testable. Consequently, many papers have been recently written proposing techniques to reduce the burden of testing analog and mixed-signal circuits. This survey attempts to outline some of this recent work, ranging from tools for simulation-based test set development and optimization to built-in self-test (BIST) circuitry.

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Section: Reducing the Cost Of Production Testmentioning

confidence: 99%

A tutorial introduction to research on analog and mixed-signal circuit testing

Milor

1998

IEEE Trans. Circuits Syst. II

224

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A framework for design for testability of mixed analog/digital circuits

Jarwala

Tsai

Proceedings of the IEEE 1991 Custom Integrated Circuits Conference

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Testing a DSP-Based Mixed-Signal Telecommunicatians Chip

Astrachan¹,

Brooks²,

Everett³

et al.

Proceedings International Test Conference 1992

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Testability enhancements used in the design, development, and production of a 1.6 million transistor mixed-mode telecommunications integrated circuit are described. Integrated test features include a test block which provides an interface to the chip bus during test, scan test circuitry for testing of individual blocks, special circuitry to allow isolation of the digital and arialog portions of ihe chip during test, and an on-chip debugger incorporated in software. In addition to facilitating high volume, low cost testing with high quality fault coverage, the testability enhancements reported in this paper also allowed concurrent development of the digital and analog portions of the chip and resulted in a dramatic decrease in product development time.

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Test features of the MC145472 ISDN U-transceivers

Cited by 3 publications

References 5 publications

A tutorial introduction to research on analog and mixed-signal circuit testing

A tutorial introduction to research on analog and mixed-signal circuit testing

A framework for design for testability of mixed analog/digital circuits

Testing a DSP-Based Mixed-Signal Telecommunicatians Chip

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