TFET simulation using Matlab and sentaraus TCAD

Abstract

TFET (Tunnel field effect transistor) is widely used in low voltage operating electronic devices because of the ability to achieve a subthreshold swing lower than 60mV/decade. Lower subthreshold swing is also a root cause for the low power and the high speed behavior of the device. Conduction of current in TFET is due to band to band tunneling. TFET has lower-off currents as compared to MOSFET. Because of which power dissipation is also lower. In this paper, Kane-Sze formula based analytical model is used to evaluate and improve drain current. Using this analytic model, the obtained value of drain current is 2.3mA at VDS=0.4V, transconductance (gm) is 160V -1 , transconductance to drain current ratio is 2200 V -1 , output resistance (R0) is 1.E4 ohm, intrinsic gain of the TFET is obtained 1.0E5 V/V. The fabrication of TFET is done using Sentaurus TCAD tool. Also, the output characteristics of the TFET and tunneling phenomenon have been analyzed.Keywords-Tunnel field effect transistor, band to band tunneling, transconductance, low voltage operating transistor

Drain current model for a hetero‐dielectric single gate tunnel field effect transistor (HDSG TFET)

“…The electrical characteristics of these HDG TFET devices are mostly predicted with the help of TCAD simulator. 35,36 An analytical compact model is required for the faster circuit simulation to understand the working principle of the HDG TFET in depth. But models presented in literature are either based on iterative methods or several assumptions.…”