2011 IEEE Electronics, Robotics and Automotive Mechanics Conference 2011
DOI: 10.1109/cerma.2011.53
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THD in Cascade Multilevel Inverter Symmetric and Asymmetric

Abstract: This paper focuses on the comparative study of cascaded multilevel inverter whit two inverter cells, symmetric (5 levels) and asymmetrical (7 and 9 levels). These inverters are implemented without changes in the Power Semiconductor Devices, only modify the control stage and input supply voltages in the cells. This work presents the analysis of the output voltage total harmonic distortion (THD) and shows the results in simulation of cascaded multilevel inverters symmetrical and asymmetrical.

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Cited by 26 publications
(11 citation statements)
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“…It is noteworthy to mention that if the voltage ratio between VC1 and VC2 is different from that stated in Equation (16), then Vout results with deformations and, as a pertinent consequence, some harmonics can be injected to the power grid. The harmonic distortion due to the imbalance of DC sources in DC/AC cascade-cell converter has been already studied [18]. As VC1 and VC2 depend of D1 and D2, a larger or shorter of the latter will deform Vout.…”
Section: Dc/ac Nine Levels Cascaded Cell Topologymentioning
confidence: 99%
“…It is noteworthy to mention that if the voltage ratio between VC1 and VC2 is different from that stated in Equation (16), then Vout results with deformations and, as a pertinent consequence, some harmonics can be injected to the power grid. The harmonic distortion due to the imbalance of DC sources in DC/AC cascade-cell converter has been already studied [18]. As VC1 and VC2 depend of D1 and D2, a larger or shorter of the latter will deform Vout.…”
Section: Dc/ac Nine Levels Cascaded Cell Topologymentioning
confidence: 99%
“…However, the symmetric CHB structure has definite merits in high-power applications due to fault tolerance/reliability and modularity. The recent trend is to use a symmetric MLI fed by a multipulse rectifier [12]- [13] for high-and medium-power applications in industry. Balance its floating capacitor.…”
Section: Fig 2 Circuit Diagram Of the Proposed Topology (Single-phamentioning
confidence: 99%
“…Conventional multi-level inverters, such as diode clamped multi-level inverters [4][5][6][7], flying capacitor multi-level inverters [8][9][10][11], and CMLIs [12][13][14], have some drawbacks if the number of voltage levels increases. The cost of the switching components and capacitors increases quickly as the number of voltage levels grows, and it also happens to the complexity of their implementations [15]. The analytical comparison results of various topologies with various DC voltage ratios for CMLIs were presented in [16] by applying a harmonic elimination technique.…”
Section: Introductionmentioning
confidence: 99%