IEEE Computer Society Annual Symposium on VLSI
DOI: 10.1109/isvlsi.2004.1339501
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The "4-diamond circuit" - a minimally complex nano-scale computational building block in QCA

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Cited by 20 publications
(14 citation statements)
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“…The goal of this work is to design and evaluate simple FPGA structure using 4:1 Multiplexers. All the circuits are simulated using QCADESIGNER tool [16] [20].Interconnection networks for traditional CMOS FPGAs utilize memory to configure the pass transistors which regulate the flow of information between programmed logic elements [24]. In QCA there are no direct counterparts to Memory or pass transistors, and keep the fabrication complexity to a minimum with the logic elements which are static.…”
Section: Qca Clockingmentioning
confidence: 99%
“…The goal of this work is to design and evaluate simple FPGA structure using 4:1 Multiplexers. All the circuits are simulated using QCADESIGNER tool [16] [20].Interconnection networks for traditional CMOS FPGAs utilize memory to configure the pass transistors which regulate the flow of information between programmed logic elements [24]. In QCA there are no direct counterparts to Memory or pass transistors, and keep the fabrication complexity to a minimum with the logic elements which are static.…”
Section: Qca Clockingmentioning
confidence: 99%
“…Earlier efforts based on programming the device by selective clocking end up using NAND gate based logic in a bid to work around the wire crossing problem [6], [7]. The 2-input NAND structures are rather "contrived" gates in the QCA world.…”
Section: Programmable Qca Device Architecturesmentioning
confidence: 99%
“…The use of elaborate structures to build CLBs or routing based basic blocks translate to giving up the benefits of QCA [4], [5], [6], [7]. Also, a subtle property of the QCA paradigm which has largely been ignored when architectures were designed for programmable QCA devices is that the same arrangement of cells can function differently with different clock assignments to the cells.…”
Section: Programmable Qca Device Architecturesmentioning
confidence: 99%
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“…When examining the existing design of an ALU for a simple processor [11], one version is potentially 1800 times more dense (assuming deterministic cell placement) than an end of the CMOS curve equivalent (0.022 micron process). If based on a more implementable FPGA (whose logic cell is a single NAND gate), the ALU is no less dense than a fully custom, end of the CMOS curve equivalent [12]. Clearly, realizable and potential QCA systems warrant further study.…”
Section: Qca Winsmentioning
confidence: 99%