The Characteristics of Amorphous Silicon TFT and its Application in Liquid Crystal Display

Abstract

An amorphous silicon TFT particularly suited for the full color liquid crystal display driver has been developed and reported here. Various fundamental factors involved in the a-Si TFT, such as the effects of structure, materials, and the method of fabrications were reviewed and investigated in terms of the field effect mobility, the threshold voltage and the reliabilities. An inverted-staggered TFT structure was employed for the purpose wherein the interface states between two layers was successfully lowered by employing the successive deposition procedures of SiNx gate insulator on the a-Si layer. Proper ohmic contacts and the blocking of hole injections were accomplished by forming a n+ layer between the a-Si layer and the source/drain metal electrodes which consists of a double layer of Al/MoSi2 in order to prevent the aluminum diffusion into the a-Si layer during the 300°C heat treatment at the succeeding fabrication processes. The degradation of display images due to the high intensity backlights was minimized by employing a light shielding layer and by making the thickness of a-Si layer 200 Å against the direct sunlight of up to 100,000 luxes. Stable actual performances of TFT for more than 4000 hours at 80 °C were confirmed. The development of a color LCD TV driven by this TFT is also reported.

Plasma Etching and Deposition for a‐Si:H Thin Film Transistors

“…Plasma frequency is another factor that influences the PECVD deposition process. In addition to the industrial standard 13.56 MHz, higher frequency, such as 70 and 144 MHz, has been used to deposit a-Si:H. 168,: 69 The deposition rate is increased with the high frequency generator due to the high dissociation efficiency of SiH~. Another frequency-related method is the amplitude-modulated RF generator.…”

Large Area Digital X‐ray Imaging

“…The TFTs that have been developed to date include staggered, inverted staggered, coplanar, and dual gate structures [49,50]. The inverted staggered tri-layer structure (see cause of the lower interfacial density of states between the gate dielectric and the a-Si : H layer and smoother interface morphology [51,52]. In conventional imaging arrays, the TFT connects the detector and the storage capacitor (C S ) in the pixel to the read-out circuitry via the data line ( Figure 1.1.24).…”

Stability of double gate amorphous In–Ga–Zn–O thin-film transistors with various top gate designs

“…The former contributes the image flicker or sticking in the display as well as the reduction of the switching speed in the circuit and the later will cause extra power consumption. [12][13][14] There is an important stability issue in the oxide TFTs, i.e., the drain voltage (V d ) induced threshold voltage (V th ) shift, which is rarely studied. In this manuscript, authors studied the influence of the top gate layout on the performance and stability of the dual-gate IGZO TFT.…”