2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers 2014
DOI: 10.1109/vlsit.2014.6894424
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The demonstration of D-SMT stressor on Si and Ge n-FinFETs

Abstract: The ~20% Id,sat improvement is demonstrated successfully on the Si and Ge n-FinFETs with the implement of D-SMT stressor for the first time, based on the optimization of dislocation angle and the understanding of crystal re-growth velocities along different surface planes and directions in Si and Ge. The mobility enhancement ratio with D-SMT stressor in Ge n-FinFET (37%) is found to be larger than it in the Si n-FinFET (30%). Ultra-high capping stress film (>3 GPa) is needed and is the must to modify the cryst… Show more

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Cited by 5 publications
(3 citation statements)
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“…Other approaches to improve FET performance include the use of substrates such as Ge and III-V materials, 16,17) having much higher electron and hole mobility than Si. Although several LSI fabrication processes for Ge FinFETs have already been reported, [18][19][20][21][22][23][24][25][26][27][28] parasitic resistance reduction and more ultra-shallow junction formation remain as key challenges. This is especially true for NMOSFETs because of the low solubility and large diffusion coefficients [29][30][31] of n-type dopants in Ge.…”
Section: Introductionmentioning
confidence: 99%
“…Other approaches to improve FET performance include the use of substrates such as Ge and III-V materials, 16,17) having much higher electron and hole mobility than Si. Although several LSI fabrication processes for Ge FinFETs have already been reported, [18][19][20][21][22][23][24][25][26][27][28] parasitic resistance reduction and more ultra-shallow junction formation remain as key challenges. This is especially true for NMOSFETs because of the low solubility and large diffusion coefficients [29][30][31] of n-type dopants in Ge.…”
Section: Introductionmentioning
confidence: 99%
“…However, no any device data on the Si 3-D FinFET device with an implement of the D-SMT stressor have been published so far. In this paper, we demonstrate the huge Si 3-D FinFET device performance improvement by using the D-SMT stressor, based on the understanding for the characteristics of crystal re-growth velocities along different directions on the Si substrate [8]. The stressed SiN capping film is also found that it plays an important role to change the crystal re-growth velocities along different directions and can be further used to optimize the θ to give the larger stress in the device channel region for the larger mobility booster [6], [8], [9].…”
Section: T He Dislocation-stress Memorization Technique (D-smt)mentioning
confidence: 99%
“…Further investigation/application and the mechanism of this stress memory technology can also be found in [2]. …”
mentioning
confidence: 99%