The Design of Low-Voltage, Low-Power Sigma-Delta Modulators

Low-Power Low-Voltage ΔΣ Modulator Using Switched-Capacitor Passive Filters

“…It is a gain stage, G, followed by additive white quantization noise. The gain factor G in a conventional active modulator is estimated as unity [12] assuming the integrators swing is maintained close to the reference voltage. In a passive modulator the signal swing at the quantizer input is much weaker than the reference level, due to the successive attenuation by the passive filters [1][2][3], resulting in a non-unity G. This gain is lumped into the comparator input, according to Fig.…”

Modeling of Switched-Capacitor Delta–Sigma Modulators in SIMULINK

“…While in SR-limited region, the output of the op-amp operates in its nonlinear part, in the bandwidth-limited region (small-signal settling period) it behaves linearly [5], [6]. In the high-resolution applications, the integrator is forced to settle in fast regime wherein the settling time constant is smaller than an upper limit and the SR is larger than a lower limit [7]. Therefore, for an integrator, in the presence of its op-amp's UGBW and SR, its settling behavior will be linearly/nonlinearly affected.…”

“…The input-referred thermal noise of the typical integrator shown in Fig. 1(a) is [7] (17) and for the CDS one shown in Fig. 1(b) is (18) where denotes the input-referred thermal noise of the op-amp.…”

A 0.7-v, 1.9mw integrator based on self-biased digital inverter in 90nm cmos technology

“…The basic element in the switched-capacitor integrator circuits is an operational transconductance amplifier (OTA) which consumes the most power in these circuits, but it is hard to design low voltage and low power OTAs in scaled CMOS technologies. Several techniques have been suggested to design low voltage analog circuits by using charge pumps (1), (2) switched-op amps (3), switched-RC (4) and the input-feed forward architecture (5). In charge pumps technique, higher voltage than the supply voltage is developed for switches (1), (2 All mentioned approaches require extra control circuits and extra current with consumes high power and occupy the large area.…”

“…Several techniques have been suggested to design low voltage analog circuits by using charge pumps (1), (2) switched-op amps (3), switched-RC (4) and the input-feed forward architecture (5). In charge pumps technique, higher voltage than the supply voltage is developed for switches (1), (2 All mentioned approaches require extra control circuits and extra current with consumes high power and occupy the large area. In (5) are proposed the Ultra-deep-submicron standard digital CMOS technologies to minimize the power consumption in a low voltage environment.…”