The effect of implant species and doping level on cobalt silicide contact formation on ultra-shallow junctions

Abstract

Cobalt silicide layer formation on ultra-shallow junctions (< 100 nm deep) was studied as a function of junction doping species and concentration over the range from below the electrical activation limit to above it. The silicide thickness, as measured by XRF, was uniform to within 2-3% (1 sigma) and did not depend on the junction doping.XTEM measurements showed that the silicide microstructure was unaffected by doping.N o discernible effect of doping or species could be observed on the silicide sheet resistance, where the standard deviation of the resistance variation across a 200 mm wafer was 3-496.Silicides formed on substrates which were initially amorphized by the junction implant were slightly smoother than those formed on undoped wafers or B junctions.A large fraction (8040%) OP the junction dose was lost to the growing silicide,

Towards Contact Resistance Minimization through CoSi2Formation Process Optimization on P-Doped Poly-Si by Hot Wall-Based Rapid Thermal Annealing

“…13 CoSi 2 layers formed on initially amorphized substrates by the junction implant were slightly smoother than those formed on undoped Si wafers or B junctions. 13 A large fraction (80-90%) of the implanted dose loss to the growing CoSi 2 was also reported. Effects of annealing techniques were not in the scope of the previous study.…”

“…6,8,16,18 Dopant species and concentration also play important roles in silicide formation and defect generation. 9,12,13 Tungsten silicide, titanium silicide, cobalt silicide and nickel silicide formation studies on various Si phases and structures, including silicon-on-insulator (SOI) wafers, have been reported for several decades. [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18] Sometimes, ion implantation on silicide layers is done to reduce line width dependence thus potentially extending the lifecycle of the selected silicide for the next generation devices with narrower line widths.…”

“…9,12,13 Tungsten silicide, titanium silicide, cobalt silicide and nickel silicide formation studies on various Si phases and structures, including silicon-on-insulator (SOI) wafers, have been reported for several decades. [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18] Sometimes, ion implantation on silicide layers is done to reduce line width dependence thus potentially extending the lifecycle of the selected silicide for the next generation devices with narrower line widths. 2,3,14 While various combinations (species, energy and dose) of dopant implantation for contact resistance reduction have been actively investigated, very little in the way of dopant profile modification efforts have been reported on forming silicides at the Si interface to reduce contact resistance.…”

“…2,3,14 While various combinations (species, energy and dose) of dopant implantation for contact resistance reduction have been actively investigated, very little in the way of dopant profile modification efforts have been reported on forming silicides at the Si interface to reduce contact resistance. 12,13 For 2X and 1X technology nodes of memory devices, CoSi 2 is widely used even though there is a tendency of forming voids within very narrow poly-Si lines (i.e. ∼50 nm).…”

“…Significant effort has been expended to develop low resistivity junctions, industry wide. [7][8][9][10][11][12][13][14][15][16][17][18] However, low resistivity contact formation has not received significant attention, other than changing the silicide of choice, depending on required minimum line width or device node parameters. Silicidation process is believed to be well understood and established.…”