The Effect of Incomplete Ionization on SiC Devices during High Speed Switching

Abstract

SiC devices such as MOSFETs and SBDs reduce power loss in fast-switching condition as compared to Si devices. However, shallow and deep levels in SiC significantly affect dynamic characteristics of SiC devices. We already reported that high densities of deep levels were discovered in Al+-implanted samples other than the shallow Al acceptor level. In this work, we applied the deep level to the TCAD simulation, and examined the behavior of the carriers at high dV/dt conditions.

Temperature Dependence of dV/dt Impact on the SiC-MOSFET

“…Moreover the Al acceptor in 4H-SiC is located at deep energy level in the band gap [3,4] and this would lead to a time-delay of hole generation, especially at lower temperature [5,6]. The delay of the hole generation would strengthen the coupling between the gate and drain electrode, increase the induced voltage on the gate electrode by the dV/dt impact and cause the self-turn-on.…”