The hysteresis-free negative capacitance field effect transistors using non-linear poly capacitance

Fan, Shixiong; Yan, Jiangnan; Lai, Da-Wei; C, Liu

doi:10.1016/j.sse.2016.04.012

Cited by 8 publications

(2 citation statements)

References 35 publications

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“…It is very easy to find the existence of overlap between the top-gate electrode and source/drain electrode. According to the study of Fan [32], source/drain overlap could contribute additional capacitance to MOS structure, and larger MOS capacitance seems beneficial for the NCFET to achieve a steeper subthreshold slope. However, oversized overlap might result in greater leakage current.…”

Section: Resultsmentioning

confidence: 99%

2D negative capacitance field-effect transistor with organic ferroelectrics

et al. 2018

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In the past fifty years, complementary metal-oxide-semiconductor integrated circuits have undergone significant development, but Moore's law will soon come to an end. In order to break through the physical limit of Moore's law, 2D materials have been widely used in many electronic devices because of their high mobility and excellent mechanical flexibility. And the emergence of a negative capacitance field-effect transistor (NCFET) could not only break the thermal limit of conventional devices, but reduce the operating voltage and power consumption. This paper demonstrates a 2D NCFET that treats molybdenum disulfide as a channel material and organic P(VDF-TrFE) as a gate dielectric directly. This represents a new attempt to prepare NCFETs and produce flexible electronic devices. It exhibits a 10^6 on-/off-current ratio. And the minimum subthreshold swing (SS) of the 21 mV/decade and average SS of the 44 mV/decade in four orders of magnitude of drain current can also be observed at room temperature of 300 K.

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Section: Resultsmentioning

confidence: 99%

2D negative capacitance field-effect transistor with organic ferroelectrics

et al. 2018

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“…The steep switching characteristics of NCFETs, with high I ON /I OFF ratio, have been demonstrated both experimentally [10][11][12][13][14][15] and through simulations [16][17][18][19][20][21][22][23] using single gate structures (NC-SGFET) as well as double gate (NC-DGFET), triple gate FinFET (NC-FinFET) and gate-allaround (NC-GAAFET) architectures. In all cases, NCFETs exhibited lower SS, and larger I ON /I OFF ratio than their baseline (without FE layer) counterparts.…”

Section: Introductionmentioning

confidence: 95%

Influence of device architecture on the performance of negative capacitance MFMIS transistors

Sakib

Mullick

Shahnewaz

et al. 2019

Semicond. Sci. Technol.

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We report a comparative analysis of the performance of negative capacitance field-effect transistors (NCFETs) with single gate, double gate, tri-gate (FinFET) and gate-all-around (GAA) device architectures, using TCAD simulations. Metal-ferroelectric-metal-insulatorsemiconductor (MFMIS) structure is chosen for all NCFET devices. The NC behavior is attributed to the ferroelectric (FE) layer introduced into the gate stack of these devices. With aluminum doped hafnium oxide as the FE, electrical characteristics of NCFETs, with 40 nm or equivalent gate length, were simulated by solving a combination of Landau-Khalatnikov (LK) equation and metal oxide semiconductor field-effect transistor (MOSFET) equations. At a drain voltage, V D =50 mV, NC-FinFET and NC-GAAFET achieve 45% and 67.5% reduction in subthreshold swing (SS), respectively, compared to baseline devices, without any NC effect. In addition to improving sub-threshold performance, NCFETs have also shown higher I ON /I OFF ratio than baseline devices for all device architectures. By tuning the thickness of the FE material, we have demonstrated capacitance matching, between FE and MOS capacitances, for non-hysteretic operation in NC-FinFET and NC-GAAFET. Matching FE and MOS capacitances allow for maximum NC effect. Results obtained from our TCAD simulations are consistent with reported experimental data and could provide useful insights into the design, operation and performance improvement of next generation NCFET devices.

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