The Impact of LO Phase Noise in N-Path Filters

Tapen, Thomas; Boynton, Zachariah; Yuksel, Hazal; Apsel, Alyssa; Molnar, Alyosha

doi:10.1109/tcsi.2017.2761260

Cited by 18 publications

(4 citation statements)

References 14 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In a fully integrated solution, the BRF would be clocked with the same noisy LO as the TX. Based on the analysis in [52], it is easy to show that this introduces an additional noise due to reciprocal mixing in the BRF that will not be cancelled in the digital domain. Considering f TX between 1 and 2 GHz, with the Class-B oscillator proposed in [51] for a power of 10 mW, a phase noise below −173 dBc/Hz at 50 MHz offset is expected.…”

Section: B Aux Performancementioning

confidence: 99%

An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands

Montanari

Castellano

Kargaran

et al. 2018

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

Antenna-coupling group delay limits the cancellation bandwidth of conventional self-interference cancellers (SICs), making it difficult to ensure isolation in both transmit (TX) and receive (RX) bands. Isolation over both bands is achieved in the dual-path receiver architecture proposed in this paper. The main path consists of a highly linear current-mode RX with a passive RF SIC. The auxiliary path implements a notch in the TX band followed by an adaptive digital equalizer whose output is used to suppress the TX noise leakage in the RX band. The main and auxiliary receiver prototypes, implemented in 28-nm CMOS technology, operate between 1 and 2 GHz, occupy an area of 0.51 and 0.12 mm 2 , and have a power dissipation of 32-40 and 26-64 mW, respectively. The stand-alone RX has a noise figure (NF) of 4-5 dB and an out-of-band IIP3 of 18 dBm. Turning on the passive canceller results in an effective IIP3 of 25-29 dBm and a degradation of the NF of less than 0.8 dB. Thanks to its high dynamic range, the auxiliary path suppresses the TX noise by >29 dB while degrading the RX NF by only 1 dB at 23-dBm TX output power.

show abstract

Section: B Aux Performancementioning

confidence: 99%

An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands

Montanari

Castellano

Kargaran

et al. 2018

IEEE J. Solid-State Circuits

View full text Add to dashboard Cite

show abstract

“…Local oscillator jitter (J LO ) is a key metric, as it degrades the N-path filter's performance [18], [19]. Two significant contributors to J LO are stochastic jitter (J stoch ), due to noisy transistors, and deterministic jitter (J det ), due to mismatch between chains.…”

Section: B Specificationsmentioning

confidence: 99%

Inverter Chain Buffer Optimization for N-path Filter Switch Drivers and Validation through Simulations in 22nm FD-SOI Technology

Overeem,

Alink,

Nauta

2023

2023 IEEE International Symposium on Circuits and Systems (ISCAS)

View full text Add to dashboard Cite

In this paper, the CMOS inverter chain buffer is optimized for N-path filter switch drivers in a technologyagnostic way. Figures-of-merit are proposed to minimize jitter for minimal power dissipation with consideration of rise/fall-time. Using these, mathematical models are derived based on a simple circuit model and expressed for optimization as a function of the technology-specific inverter output/input capacitance ratio, the number of inverters, and their taper factors. This enables finding designs with any set of taper factors that have lower jitter than common designs for the same power dissipation by sweeping many designs orders of magnitude faster than using circuit simulations. Additionally, analytical equations are derived to quickly allow a designer to find the optimal number and sizing of inverters for the constant and exponential taper designs, either of which is shown to be near-optimal depending on the set of specifications.

show abstract

“…While LO-phase noise is similar to conventional mixers in N-path mixer RX, N-path filters and non-reciprocal circuits must consider reciprocal mixing due to phase noise and it's impact on noise figure. An analysis of phase noise for such architectures is presented in [42]. Additionally, clock path imperfections can lead to noise/signal folding from harmonics and degraded blocker rejection and therefore the clock design must be careful to avoid overlap between LO pulses [43].…”

Section: Reconfigurable Interferer-tolerant N-path Filters and Mixer-first Receiversmentioning

confidence: 99%

Recent Developments in Integrated Interferer-Tolerant Receivers for Reconfigurable Radios

et al. 2021

View full text Add to dashboard Cite

Fragmented spectrum allocations at RF and mm-Wave, increased use of carrier aggregation/MIMO and dense spectrum-reuse in wireless links has led to interest in the design of integrated wideband, high-linearity MIMO RX that provide low noise, blocker tolerance and reconfigurability across signal domains. In this paper, receive architectures for wide operating range and blocker tolerance are presented with a focus on recent developments in reconfigurable N-path receivers. Generalized sequence-mixing architectures that support reconfigurable frequency/spatial/code-domain rejection and filtering are described along with directions of research extending operation to wider bandwidths and higher frequencies.INDEX TERMS N-path filters, reconfigurable receivers, current-mode, passive mixers, sequence mixers, spatio spectral filtering, walsh function sequence based notch filters, blocker tolerant receivers, blocker tolerant MIMO, interference tolerant receivers.This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.

show abstract

The Impact of LO Phase Noise in N-Path Filters

Cited by 18 publications

References 14 publications

An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands

An FDD Wireless Diversity Receiver With Transmitter Leakage Cancellation in Transmit and Receive Bands

Inverter Chain Buffer Optimization for N-path Filter Switch Drivers and Validation through Simulations in 22nm FD-SOI Technology

Recent Developments in Integrated Interferer-Tolerant Receivers for Reconfigurable Radios

Contact Info

Product

Resources

About