The Intrinsic Noise Figure of the MESFET Distributed Amplifier

Aitchison, C.S.

doi:10.1109/tmtt.1985.1133100

Cited by 129 publications

(59 citation statements)

References 7 publications

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“…However, low termination resistance is advantageous to noise figure [10,11]. The designed distributed amplifier has 35 Ω of R G1 in Fig.…”

Section: Gan Lna Designmentioning

confidence: 99%

An X-Ku Band Distributed GaN LNA MMIC with High Gain

Kim¹,

Lee²,

Sim³

et al. 2014

JSTS:Journal of Semiconductor Technology and Science

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Abstract-A high-gain wideband low noise amplifier (LNA) using 0.25-μm Gallium-Nitride (GaN) MMIC technology is presented. The LNA shows 8 GHz to 15 GHz operation by a distributed amplifier architecture and high gain with an additional common source amplifier as a mid-stage. The measurement results show a flat gain of 25.1±0.8 dB and input and output matching of -12 dB for all targeted frequencies. The measured minimum noise figure is 2.8 dB at 12.6 GHz and below 3.6 dB across all frequencies. It consumes 98 mA with a 10-V supply. By adjusting the gate voltage of the mid-stage common source amplifier, the overall gain is controlled stably from 13 dB to 24 dB with no significant variations of the input and output matching.

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“…However, low termination resistance is advantageous to noise figure [10,11]. The designed distributed amplifier has 35 Ω of R G1 in Fig.…”

Section: Gan Lna Designmentioning

confidence: 99%

An X-Ku Band Distributed GaN LNA MMIC with High Gain

Kim¹,

Lee²,

Sim³

et al. 2014

JSTS:Journal of Semiconductor Technology and Science

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“…The gain G of the conventional distributed amplifier has been analyzed in [10] and can be estimated, in a loss-free case, by…”

Section: Circuit Analysismentioning

confidence: 99%

A DC to 20 GHz ultra-broadband high-gain-linear distributed power amplifier with 19.5% drain efficiency

Bameri

Hakimi

Movahhedi

et al. 2010

2010 18th Iranian Conference on Electrical Engineering

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Abstract-In this paper an ultra-broadband linear distributed power amplifier (DPA) is presented. This amplifier consumes only 100 mW DC power and amplifies input powers up to -3.7 dBm with a power gain of 16.7 dB linearly. Output power at 1-dB compression point is 13 dBm in the linear-mode. By increasing the level of input power, the amplifier no longer works in the linear-mode, drain efficiency and non-linear distortions are increased, and power consumption is decreased to 90 mW. S 21 parameter is 18±0.9 dB over DC to 20 GHz. The architecture of all power gain cells (including three stages) is cascade of inductively coupled common source. This amplifier is simulated in a 0.13 um CMOS technology.

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“…Furthermore, , because in an artificial transmission line the delay caused by each delay line segment is , and is designed to be identical for RF, LO, and IF artificial T-lines. The noise current appearing at the output of the kth cell experiences a unit delay to reach at the load termination, hence, becomes (for ) (16) The thermal noise due to the source resistance, and its replica components traveling through individual mixer cells are correlated, because they have the same noise source. The additional factor comes from the fact that at each tap-point of the IF T-line, the noise evenly splits into two correlated terms.…”

Section: A Noise From the Driver Stage (Rf Stage) 1) Noise From The mentioning

confidence: 99%