The mechanism of electrical annihilation of conductive paths and charge trapping in silicon-rich oxides

Abstract

The electrical properties of silicon-rich oxide (SRO) films in metal-oxide-semiconductor-like structures were analysed by current versus voltage (I-V) and capacitance versus voltage (C-V) techniques. SRO films were thermally annealed to activate the agglomeration of the silicon excess in the form of nanoparticles (Si-nps). High current was observed at low negative and positive voltages, and then at a certain voltage (V(drop)), the current dropped to a low conduction state until a high electric field again activated a high conduction state. C-V measurements demonstrated a capacitance reduction at the same time as the current dropped, but without appreciable flat-band voltage (V(FB)) shifting. The reduction in capacitance and current was also observed after applying an electrical stress. These effects are ascribed to the annihilation of conductive paths created by Si-nps. An equivalent circuit is used to explain the capacitance and current reductions. Finally, the conduction mechanism is also analysed by making use of trap assisted tunnelling and Fowler-Nordheim tunnelling at low and high electric fields, respectively.

Luminescent Devices Based on Silicon-Rich Dielectric Materials

“…This behavior was observed by our group before in SRO ilms with Ro =30, and it was related to the creation and annihilation of preferential conductive paths generated possibly by adjacent stable Si-nps and unstable silicon nanoclusters (Si-ncls) through structural changes and by the possible creation of defects (breaking of Si-Si bonds) [70,79,80]. Indeed, a clear correlation between current jumps/drops and EL dots appearing/ disappearing on the LEC surface was observed [70,79,80]. This RS behavior is independent on the thermal annealing temperature [46].…”

Analysis of the electrical behavior of silicon rich silicon oxides

“…At some point during the electrical stress, the current drops to a low leakage situation [16]. At the same time the luminescent dots disappear [17].…”

“…The LPCVD sample presents both kinds of leakage: as obtained devices show high leakage, which turns into low leakage after the application of an electrical stress. This behavior has been attributed to the annihilation of the preferential conductive paths [16].…”

Influence of trapping and de-trapping charge in MOS-like structures with single and twofold SiOx films as active layers

“…The high conduction states at low voltages have been related to the presence of conductive paths in the SiO x films, which connect the FTO gate to the Si substrate. The current drop can be explained as a result of the annihilation of such conductive paths [21]. As for RB applied, the current has a typical I-V behaviour, which is also present at a current lesser than that for FB.…”

“…Likewise, for virgin 2, current fluctuations are observed; the highest current is measured in a particular voltage V = 15 V due to a high conduction mechanism not well identified which is active at this particular voltage. Immediately after this voltage is exceeded, the current drops drastically to an intermediate conduction state, and then finally drops into a low conduction mechanism; for voltages above 22 V the current starts to increase again by Fowler-Nordheim tunnelling [21]. The high conduction states at low voltages have been related to the presence of conductive paths in the SiO x films, which connect the FTO gate to the Si substrate.…”