The reliability performance of low cost bumping on aluminum and copper wafer

Uang, Ruoh-Huey; Chen, Kuo-Chuan; Lu, Szu-Wei; Hu, Hsu-Tien; Huang, S. H.

doi:10.1109/eptc.2000.906389

Cited by 6 publications

(1 citation statement)

References 4 publications

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“…The test load is 100 g force and the test speed is 100 μm s −1 . The average shear strength of eighty solder bumps is 71.9 MPa (figure 10) and the minimum value is 60 MPa, which is larger than the performance index for general solder bumps [24][25][26].…”

Section: Shear Strength Testmentioning

confidence: 84%

A wafer-scale packaging structure with monolithic microwave integrated circuits and passives embedded in a silicon substrate for multichip modules for radio frequency applications

Geng

Ding

et al. 2009

J. Micromech. Microeng.

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A wafer-level packaging structure with chips and passive components embedded in a silicon substrate for multichip modules (MCM) is proposed for radio frequency (RF) applications. The packaging structure consists of two layers of benzocyclobutene (BCB) films and three layers of metalized films, in which the monolithic microwave ICs (MMICs), thin film resistors, striplines and microstrip lines are integrated. The low resistivity silicon wafer with etched cavities is used as a substrate. The BCB films serve as interlayer dielectrics (ILDs). Wirebonding gold bumps are used as electric interconnections between different layers, which eliminate the need of preparing vias by costly procedures including dry etching, metal sputtering and electroplating. The chemical mechanical planarization (CMP) is used to uncover the gold bumps, and the BCB curing profile is optimized to obtain the appropriate BCB film for CMP process. In this work, the thermal, mechanical, electrical as well as RF properties of the packaging structure are investigated. The packaging thermal resistance can be controlled below 2 • C W −1 . The average shear strength of the gold bumps on the BCB surface is about 70 MPa. In addition, a Kelvin test structure is fabricated for resistance testing of the vertical vias. The performances of MMIC and interconnection structure at high frequency are simulated and tested. The testing results reveal that the slight shifting of S-parameter curves of the packaged MMIC indicates perfect transmission characteristics at high frequency. For the transition structure of transmission line, the experimental results are compatible with the simulation results. The insertion loss (S 21 ) is below 0.4 dB from 0 to 40 GHz and the return loss (S 11 ) is less than −20 dB from 0 to 40 GHz. For a low noise amplifier (LNA) chip, the S 21 shifting caused by the packaging structure is below 0.5 dB, and S 11 is less than −10 dB from 8 GHz to 14 GHz.

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Section: Shear Strength Testmentioning

confidence: 84%