The SIDECAR ASIC is a fully integrated FPA controller system-on-a-chip. Compared to conventional control electronics, it requires significantly less power, less space and less weight. The SIDECAR ASIC, which can operate at ambient and cryogenic temperatures, is currently being space-qualified for integration in the science instruments of the James Webb Space Telescope (JWST). This paper gives an overview of the SIDECAR architecture and its supporting drive electronics. It describes the JWST flight configuration including the custom packaging approach. Test results obtained as part of the space qualification effort are presented. CDS noise of the ASIC itself amounts to less than 25 µV for full 2K x 2K data frames. The noise reduces to less than 6 µV for up-the-ramp-sampling with 88 frames. Based on the existing qualification results and a number of additional tests in the next few months, NASA Technology Readiness Level 6 (TRL6) will be demonstrated by August 2006.