2012
DOI: 10.1016/j.phpro.2012.02.072
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The Study on DC Capacitor Parameter Determination in Active Power Filter

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Cited by 2 publications
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“…Since DC voltage efficiency of FSTP topology is just half that of the SSTP [9], hence, DC voltage level in FSTP topology should be twice that of SSTP so as to achieve the same output. If the source voltage fluctuations as well as voltage drops across the inductor are taken into account, the DC side voltage must be even higher, that is, the FSTP topology is suitable for medium and low voltage applications.…”
Section: Mathematical Model Of Fstp Shunt Apfmentioning
confidence: 99%
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“…Since DC voltage efficiency of FSTP topology is just half that of the SSTP [9], hence, DC voltage level in FSTP topology should be twice that of SSTP so as to achieve the same output. If the source voltage fluctuations as well as voltage drops across the inductor are taken into account, the DC side voltage must be even higher, that is, the FSTP topology is suitable for medium and low voltage applications.…”
Section: Mathematical Model Of Fstp Shunt Apfmentioning
confidence: 99%
“…The DC bus capacitors should be large enough to limit the vibration of DC bus voltage [9, 23]. The DC bus capacitors should be C1=C22thickmathspacekSTnormalcmfalse(1+mfalse)udc2=43.5μnormalF where S is the APF capacity (1 kVA), m is the DC voltage fluctuation rate (2–5%), T c is the DC bus control cycle (1 ms), k is the redundancy coefficient (10).…”
Section: Vppwm Performance Studiesmentioning
confidence: 99%
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