2012
DOI: 10.1166/jnn.2012.4694
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The Sub-Micron Hole Array in Sapphire Produced by Inductively-Coupled Plasma Reactive Ion Etching

Abstract: The sub-micron hole array in a sapphire substrate was fabricated by using nanosphere lithography (NSL) combined with inductively-coupled-plasma reactive ion etching (ICP-RIE) technique. Polystyrene nanospheres of about 600 nm diameter were self-assembled on c-plane sapphire substrates by the spin-coating method. The diameter of polystyrene nanosphere was modified by using oxygen plasma in ICP-RIE system. The size of nanosphere modified by oxygen plasma was varied from 550 to 450 nm with different etching times… Show more

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Cited by 5 publications
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“…Most of the recent sapphire etching technology has been developed for producing patterned sapphire substrates (PSS) for the growth of GaN layers to fabricate light emitting diodes (LEDs), where the pattern feature depths were in the submicrometer and nanometer range [22][23][24][25][26][27][28][29][30][31][32][33] and the sidewall profiles were not vertical. To our knowledge, no study has been performed for nominal 100 µm deep etching and vertical sidewall profiles using the sapphire inductively coupled plasma (ICP) etching process.…”
mentioning
confidence: 99%
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“…Most of the recent sapphire etching technology has been developed for producing patterned sapphire substrates (PSS) for the growth of GaN layers to fabricate light emitting diodes (LEDs), where the pattern feature depths were in the submicrometer and nanometer range [22][23][24][25][26][27][28][29][30][31][32][33] and the sidewall profiles were not vertical. To our knowledge, no study has been performed for nominal 100 µm deep etching and vertical sidewall profiles using the sapphire inductively coupled plasma (ICP) etching process.…”
mentioning
confidence: 99%
“…Finally, for a 90 nm thick Cr etching mask on a sapphire wafer etched at a bias power of 150 W, the resulting sapphire etch rate was 108 nm min −1 , the selectivity was 3.1 and the sidewall profile external angle was 110°. Shiao et al [33] used a 100 nm thick Cr etching mask on a sapphire wafer in a BCl 3 /Ar gas mixture. The diameter of the etched sapphire pattern, depth of comb hole array and sidewall profile angle were 400 nm, 200 nm and 80°, respectively.…”
mentioning
confidence: 99%
“…Ordered porous silicon can be produced by transferring a primary structure from photolithography, , nanoimprint or colloidal lithography, , laser interference lithography, or block copolymer lithography into an underlying substrate. Reactive ion etching (RIE) converts the two-dimensional (2D) pattern into three-dimensional pores but depends on the availability of RIE equipment, and it is costly.…”
Section: Introductionmentioning
confidence: 99%