The synthesis of counter circuit layout design based on CMOS technology 0.35 μm

Functional Converter for Intelligent Sensor and Its Layout Design

“…Despite the fact that the layout design of elements such as registers, counters, or logic primitives is quite well developed, research on topology optimization continues. This research is related to the search for original solutions in order to optimize the chip area, power and speed [17,18]. When minimizing the circuit layout design, we are looking for solutions that minimize the main component of pulse stream information processing devices-the binary counter.…”