The temperature distributions and output parameters of an industrial c-Si solar cell under different environmental conditions

Theoretical investigation of the temperature characteristics and output parameters of an industrial crystalline silicon solar cell with a microfluidic cooling system

“…3.1. The temperature distribution features of the c-Si SC with the cooling system In our previous works [11,15], we have shown that as long as the environmental temperatures in the regions near the front and back surfaces of a c-Si SC without any artificial cooling systems are equal, the temperature distributions of the c-Si SC under different environment conditions will be nearly uniform and have almost nothing to do with the heat transfer coefficients between the c-Si SC and external environments. As far as the equivalent thermal resistant network model shown by figure 2(b) is concerned, the temperature distribution of the c-Si SC without a microfluidic cooling system will also be uniform, when T Front = T Back , but when a microfluidic cooling system is installed on the interface between the back surface of aluminum layer and EVA layer, the temperature distributions of the c-Si SC will be influenced by the cooling system.…”

“…One of the challenges of exploiting solar energy via PV technology is that the photoelectrical conversion process of a PV module is very sensitive to nearly all of environmental variables, such as season [5], latitude [6], cloud [7], dust or shelter [8], rain [9], wind [10], temperature [11] and humidity [12]. Because environmental variables are volatile, the output power of a PV module is often unstable and fluctuant.…”

“…From the perspective of photoelectrical conversion process, due to solar cells (SCs) isolated from environment by packaging, except for changing the light intensities incident on SCs [7,8,12], the effects of environmental variables on photoelectrical conversion process are mainly through changing the operating temperatures of SCs [5,6,10,11]. Researches have shown that with operating temperature increasing, the efficiencies of single junction SCs will decrease at a particular rate, such as 7.2%/K∼9.18%/K for crystalline silicon (c-Si) SCs, 9.18%/K∼10.9%/K for Ge SCs, 6.89%/K∼7.19%/K for GaAs SCs and 5.6%/K∼5.87%/K for CdTe [15,16].…”